The SX 100 VLSI Logic Test System, priced below $5,000 per pin, delivers a 100/200-MHz test data rate, up to 448 I/O channels, and edge placement accuracy of 225 ps. The tester footprint is only 11 square feet. Using a modular design, it features Schlumberger’s Sequencer Per Pin™ architecture to enable test program generation without timing or pattern compromise.
The SX 100 offers local memory depths up to 8M vectors, and looping and complex subroutines with a subroutine memory of 4k. The system can be configured with two test heads. It provides at-speed algorithmic pattern generation for embedded memory applications. Existing test programs can be ported to the SX 100 using existing conversion tools. Under $1 million. Schlumberger ATE, (408) 453-0123.
Copyright 1996 Nelson Publishing Inc.
April 1996
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