As at-speed testing of VLSI devices becomes mandatory and the system-on-a-chip era approaches, IC ATE designers are busy devising new solutions. They are not just concentrating on the technological aspects, but more on the test economics. And as exotic device packages make nodal access increasingly difficult, board ATE companies are targeting complementing process-improvement solutions at maintaining the high fault coverage demanded.
To provide you with information on recent accomplishments and a preview of the developments that may be in store for 1998, EE interviewed key executives of major IC ATE and board ATE companies. Here is some of the information they shared with us.
Board ATE Innovations and Trends
The board ATE industry has undergone tremendous changes during the last two decades. “I remember back in the early ‘80s when the ATE industry was chasing frequency,” remarked Kamran Firooz, general manager of the Manufacturing Test Division of Hewlett-Packard. “When Intel or Motorola microprocessors ran at a few megahertz, ATE was running at the same speed. When they upped their frequencies, ATE would try to keep up.
“But by the time microprocessors hit about 20 MHz, several changes occurred.
First, we realized that it was not feasible physically or economically to keep up with those increases. Secondly, the quality of the components placed on the boards was constantly improving, and the faults were more and more process-related, not part defects,” he continued.
So the whole focus of the industry changed from keeping up with the devices to adding more and more new process defect detection and prevention capabilities. That’s why we came up with TestJet,” Mr. Firooz said.
While electrical process defect tests were appropriate in the early 1990s, today’s high-density packaging techniques often do not allow adequate access to achieve adequate fault coverage. One solution could not fix all problems, but using more than one technique would be advantageous.
To provide customers with complementary solutions, several major board ATE suppliers, such as Hewlett-Packard, Teradyne, and GenRad, acquired automatic vision or X-ray structural inspection equipment companies. The results of using complementary solutions has improved product yields. For instance, the addition of X-ray has yielded an unprecedented >99% level of fault coverage, according to Mr. Firooz.
In the past, there was some concern whether X-ray could provide adequate detail—and within a short enough time so not to impede throughput. “But the new HP 5DX Series II Laminography System not only addresses the production throughput that our customers need, but also makes another giant leap in the technological dimension,” said Mr. Firooz. “It determines the critical process characteristics and dimensions of flip-chips and micro BGAs down to 4-mil balls.”
Achieving a high enough structural defect inspection rate also is an issue that GenRad addresses in the new GR vision system. “No longer are we moving a camera around the board—we are using a line-scan camera,” said Kevin Cloutier, vice president and general manager of Electronic Manufacturing Systems. “The board never stops; it just keeps on its way so that we never impede the product flow on the manufacturing line.”
GenRad combines information from automated inspection and product test systems to extract the data that enables customers to monitor, control, and adapt their processes, commented Mr. Cloutier. Emphasis is placed on providing comprehensive software and focused test hardware solutions.
“In the old days, board ATE suppliers offered general-purpose equipment and told the customer you can do anything you want with these machines—just program it,” said Mr. Cloutier. “But that has changed. Now we provide very focused solutions, not general-purpose. Of course, the key to implementing it is modularization.
“Looking ahead, you will see more robust hardware and software solutions for inspection, providing even more information. In the product test area, there will be more integration into the manufacturing line,” he continued.
“Today, you see a lot of people handling boards. We are trying to help our customers get away from that potential quality-impairment issue. The board may stop in certain product test areas, but it will not leave the line. We will continue to provide manufacturing solutions, not just ATE,” Mr. Cloutier concluded.”
IC ATE Innovations and Trends
While at-speed functional tests no longer may be the norm for most board test equipment, this is not the case for IC ATE. “In recent times, most customers demanded certification that their ICs were tested at-speed,” said Bill Bottoms, chairman and CEO of Credence. “A majority of today’s systems operate at a 20-MHz rate. However, 100 MHz is required for many new devices, so some of the installed test systems will become obsolete.”
But this new IC ATE not only must offer higher test speeds, but also deal with more functions per chip and wider buses and accommodate more I/O. In other words, they must be comprehensive, high-speed, high pin-count testers. IC ATE suppliers are responding with a variety of offerings. Credence, for instance, recently introduced the VX2000 System which accommodates 1,024 pins at a 200-MHz rate.
In addition to the many older 20-MHz and 50-MHz testers, a substantial number of systems operating at 100 MHz now are in use. Many of these will be upgraded in 1998. For example, Teradyne will modify existing 100-MHz J973 Logic IC ATE to operate at 250 MHz.
Credence will ship an ATE upgrade that enables 1.6-GHz digital-pin testing with an edge-placement accuracy of ±60 ps, according to Mr. Bottoms. “This instrument is phase and frequency coherent with the tester. We refer to our pin-driver cards as instruments because we think of our architecture as a backplane where we plug in instruments,” explained Mr. Bottoms.
“Those instruments might be 50-MHz, 200-MHz, or 1.6-GHz pin cards. Since the DUTs don’t have all pins operating at that speed, our customers save by just plugging in the high-speed solution where it is needed,” he said.
Speed increases not only are in store for logic testers, but also for memory IC ATE. “Memory test will change significantly,” said Tom Newman, vice president of corporate relations at Teradyne. “It is driven by the need for higher data bandwidth, regardless of whether it may be due to the double data rate (250-MHz) test problem or a RAMbus (800-MHz)-type problem.
“The installed base of equipment basically provides £ 100-MHz data rate,” Mr. Newman continued. “However, it eventually will have to be shifted up to the gigahertz range as people use the RAMbus license and make that technology, or an alternate one, work. Which technology is used doesn’t matter to the tester people much. A gigahertz is still a gigahertz, and it still requires a very different machine.
“To go to 800 MHz or a gigahertz not only requires higher-speed technology, but we believe that the economics of these machines also will be very different than that of the machines used today,” Mr. Newman continued. It will force some rethinking of the memory-device fabrication process such as where testing will be done and how much will be done at each stage.
“For example, if you want to test memories at a gigahertz, you can’t test 64 devices in parallel anymore because you would have too many little antennas on the interface boards. As a result, the DUT boards can’t be designed to test that many devices in parallel. You end up testing somewhat smaller numbers of memories in parallel, such as eight, and the cost per test site is much higher,” he said.
“You might want to totally change your test strategy. We offer a solution to that problem and are working with customers to anticipate how their economics are going to change,” Mr. Newman concluded.
The IC ATE industry also faces the challenge of providing equipment to test the increasing number of new ICs containing combined logic, memory, and linear circuits. Several systems were introduced in 1997 to deal with the combination of the first two technology domains: logic interspersed with large amounts of embedded memory and other systems to address the multi-dimensional, mixed-signal test requirements.
“The degree to which embedded memory is present in new logic devices has been a surprise to us,” said Mr. Newman. “The embedded-memory test capability of the J973 was one of its major features. In fact, approximately 90% of the systems have been ordered with embedded-memory test capability.”
While the growth of embedded-memory and multimedia features in logic devices was somewhat predictable, the expansion of mixed-signal has exceeded all expectations. “The mixed-signal test market is growing by leaps and bounds right now,” Mr. Newman continued. “It mainly is driven by communications and the markets that have anything to do with cellular phones, RF, or microwave.”
“The move toward wireless, as exemplified by the explosion in things like cellular phones, has driven a large part of our mixed-signal testing business this year,” concurred Neil Kelly, chief technologist at LTX. “We expect the testing of RF wireless devices to continue to be a growth factor in 1998.
“But even more significantly, during the past nine to 12 months we’ve seen that logic, embedded memory, and mixed-signal interfaces are being combined more and more on a new, highly integrated device called system-on-a-chip,” continued Mr. Kelly. “And from a test point of view, we see that as a major challenge for next year and many years to come.
“I think testing system-on-a-chip is going to be one of the largest growing segments of the test business and will be one way that semiconductor manufacturers will differentiate themselves,” Mr. Kelly continued. “System-on-a-chip is a major focus, as illustrated by our new system called Fusion.”
According to LTX, Fusion is a single-platform test system providing full digital, embedded-memory, and mixed-signal test capabilities. The system can be configured at one extreme to be a small pin-count machine for testing RF wireless devices or at the other extreme to be a mostly digital, 512-pin machine.
“But customers won’t have to pay for the extra flexibility. We have made the system modular enough so that it can compete with dedicated, focused testers,” Mr. Kelly emphasized.
Conclusion
The high pin-count of today’s IC packages, combined with leads hidden from view, has increased board density and node inaccessibility so it is becoming increasingly economical to supplement electrical PCB tests with structural inspection. Many boards no longer are tested at-speed on general-purpose board ATE, but either on focused test systems or only at final system test.
IC ATE, on the other hand, must keep pace with advancements in semiconductor fabrication technology, offer higher test speeds and more test pins, and accommodate a mix of technologies. While substantial progress is being made to incorporate design-for-test facilities in ICs, thorough tests at the device level are economically mandatory.
ATE Products
Electrical Inspection System
Suited for High-Volume Testing
The Viper System electrically inspects all classes of manufacturing process defects on PCBs. It supports up to 3,200 pins and is available in two configurations: ergonomically optimized for sit-down operation or in-line automated in conformance with SMEMA standards. Diagnostics are achieved with the TEST Xpress™ Analog Toolsuite, Junction Xpress™, Opens Xpress™, Orient Xpress™, and Cap Xpress™. Other features include automated program development and debug and the InPro Inspection Process Control Suite. GenRad, 800-4-GENRAD.
Test System Targets
System-On-A-Chip ICs
The Fusion™ IC Test System offers a modular single platform solution for testing system-on-a-chip mixed-signal, digital, and analog ICs. A palette of custom-selectable test capabilities includes VLSI digital, digital signal process, advanced mixed-signal, RF, memory, power, and time measurements. The Fusion platform is supported by the enVision++™ operating system which extends enVision™, the company’s digital test program environment, by adding the Synchro test language for mixed-signal ICs. LTX, (888) INFOLTX.
Mixed-Signal System
Tests Super-Chip ICs
The new Catalyst Series of mixed-signal test systems addresses consumer ICs with digital, memory, and analog circuits on a single chip. The series features per-pin VLSI digital, embedded memory, and high-performance analog test facilities required for short engineering development cycles and high-volume production test. The series begins at 200 MHz for high-performance digital testing, with a top speed of 400 MB/s for any function. The Universal Digital Pin™ feature simplifies parallel test. The series offers simulation from chip design to the test program and can verify both the IC and the test package before first silicon. Teradyne, (617) 482-2700.
Flash Memory ATE Features
Tester-Per-Card Architecture
The KALOS Flash Memory Test System features a tester-per-card architecture and tests 16 devices in parallel. Each one of the 16 cards constitutes an independent, 50-MHz tester and contains 48 I/O pins. The system occupies only 1 m2 of floor space and is suited for wafer and final-test applications. Credence System, (510) 657-7400.
Software System Provides
Alternative to ATE
Digital VirtualTester™ verifies and debugs IC test patterns and timing on engineering workstations rather than ATE. Using electronic design automation simulation and proprietary ATE data, the software system performs IC test development in a fault-free, virtual test environment prior to silicon fabrication. Using a Java-based user interface, Digital VirtualTester provides a model of the target ATE that represents tester memory, timing architecture, and digital pins. The software can be used with devices modeled in Verilog or VHDL. It also can be used on mixed-signal devices if test patterns that exercise the digital pins and a stand-alone Verilog model of the digital functions are available. Integrated Measurement Systems, (800) 879-7117.
X-Ray System Inspects
PCBs in 60 to 90 s
The HP 5DX Series II Cross-Sectional X-Ray Inspection System checks densely populated, double-sided PCB assemblies for solder-joint defects at a rate of one board every 60 to 90 s. It offers real-time statistical process control and has the imaging capability to inspect boards with ball grid arrays, flip-chips, and tape automated bonded components at in-line speeds. The series supports fixtureless test and requires limited programming. Hewlett-Packard, (800) 452-4844.
System Provides MDA Benefits
And High Fault Coverage
The Z1803 Test System combines the cost and cycle-time benefits of MDAs with the high fault coverage and upgradability of manufacturing process testers. It features power-off, analog, in-circuit test; DeltaScan™ vectorless test for high coverage of VLSI device opens, and FrameScan Plus™ and CapScan™ vectorless test for finding connector opens and reversed electrolytic capacitors. The Z1803 offers up to 2,048 nonmultiplexed pins, a PC-based run-time operating and programming environment, and the Momentum™ programming environment for direct CAD-to-tester data transfer. Teradyne, (510) 932-6900.
Prober Provides Automatic,
Unattended Parametric Testing
The PS21 Parametric Series Autoprober provides automatic, unattended, on-wafer DC/CV parametric measurements when interfaced with an HP 4062, an HP 4071, or a Keithley S600 test system. The autoprober is equipped with the company’s patented MicroChamber™ which ensures light-tight, noise-protected measurements. A thermal guarded chuck allows low noise measurements over a -55°C to 200°C range. A low-capacitance, low-noise probe card offers fast measurement settling times with low leakage. Up to 25 wafers can be loaded in the standard cassette. Cascade Microtech, (503) 626-8245.
System Tests SRAMs
At Probe Stage
The T5581P is a 250-MHz test system for at-speed probe of synchronous RAMs. It tests features such as latency, burst modes, double data rate, and logic- function capabilities for applications such as characterization, evaluation, and known-good die tests. A compact BiCMOS test head provides accurate, rapid probe contact while minimizing the tester footprint. The direct-dock overhead probe design incorporates the company’s precision docking interface. Edge-placement accuracy is 180 ps, and the minimum pulse width is 2 ns. It handles pin counts up to 288 I/O. Advantest America, (847) 634-2552.
Burn-In/Environmental System
Targeted for Memory Production
The ABES-MP Automatic Burn-In/Environmental Test System performs parallel dynamic testing and thermal stressing of memory devices. It features automatic insertion and extraction of burn-in boards, multiple voltage and pattern zones, 128 I/O channels, a test rate of 14 MHz, 16-X and 16-Y addresses for testing up to 4 GB memories, and 1-ns timing resolution. The system accommodates up to 64 burn-in boards. Micro Control, (612) 786-8750.
Copyright 1997 Nelson Publishing Inc.
December 1997
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