Testing transceiver and converter interfaces requires orthogonal in-phase and quadrature (IQ) analog signals; that is, the phase relationship of the two must be very close to a 90-degree phase offset, and their relative amplitudes must be balanced. Achieving this with older ATE systems requires calibration circuits on the DUT board. Relays are used to bypass the device site and route stimulus IQ signals into digitizers.
Subsequent to measurement, the stimulus signal timing and amplitude are adjusted to target values. This process occurs during the first run of an ATE program and does not impact the test time of subsequent device tests. However, the DUT board calibration circuits typically are bulky, with analog DUT board circuits accounting for more than 50% of the overall circuitry. Furthermore, given the need for mechanical relays, these circuits frequently are the cause of reliability failures, which can quickly lead to site failures.
Multisite testing complicates DUT board (PB) calibration layout due to varying trace lengths, switch losses, and triggering delays of the module's IQ DACs. MIMO devices add another dimension of complexity since they require calibration of multiple channels per device.
Instead of addressing these challenges with exponentially more complex DUT board calibration layouts, the problem can be addressed inside the ATE's baseband module itself. The arbitrary waveform generators (Arbs) and digitizer that are increasingly contained inside the baseband module could be used to greatly reduce DUT board calibration layout challenges.
Performance Board Calibration Challenges
Figure 1 shows the two important parameters that must be controlled and maintained during testing: the relative baseband amplitudes and phases of the two input signals. Ideal IQ amplitude and phases through an IQ modulator create a perfect carrier as seen in Figure 1. These two signals are produced and controlled by independent baseband DACs inside the baseband module. Low-pass filtering (LPF), gain, and DC offset are applied separately to the I and Q signals.
Excess amplitude and phase variations will affect DUT IQ imbalances. The result typically is a negative impact on yield but also could lead to passing failing parts. For that reason, great care must be taken to ensure that these input signals are as close to ideal as possible and that they will not drift or change over the course of testing tens of thousands of units per day.
All test equipment has some measurable variability. Even if we assume that the IQ DACs are ideal, we still must contend with the performance board trace length differences and losses from the baseband module to the DUT's IQ pins. Trace length differences will alter the phase delay between the two signals from the ideal 90 degrees. Trace length differences and board material variations also will adversely affect the relative losses, which degrade the amplitude balance.
One common approach to minimizing the input signal imbalances is to carefully calibrate the two input signal paths on the DUT board as close to the DUT as possible. Figure 2 illustrates how such a calibration scheme typically is implemented at a minimal cost in single-site DUT testing.
Figure 3 shows a single IQ modulator. The baseband frequency of the input sine and cosine signals is 40 MHz with a 2 Vpk-pk voltage swing. The LO carrier frequency is 100 MHz. This modulator retains the upper sideband so that the ideal output frequency is LO + RF = 140 MHz. Figure 3 exhibits ideal output.
Next, if we impair the input signals by applying amplitude, phase, and DC offset imbalances, we get the result shown in Figure 4. The combined 5-degree phase offset and 90-mV amplitude imbalance creates the lower sideband signal at ~ -24 dBc. Five degrees may not seem like much, but consider that for a 40-MHz baseband signal, a 0.38″ relative length difference creates about a 1-degree phase shift. A 1.9″ length difference would cause a 5-degree phase shift. Additionally, FR4, the most commonly used DUT board material, has on average about 0.03dB/cm of loss, which also will affect the relative amplitudes for differing trace lengths.
To minimize these effects, test engineers calibrate the amplitude and phase imbalances on the performance board by designing in a custom calibration solution. For this simple IQ modulator/demodulator having only two IQ pins, the extra calibration procedure, albeit undesired, is traditionally an accepted method.
Multisite Testing Increases Calibration Burden
As devices have become more complex, multisite testing has become a pervasive method of cost reduction for high-volume consumer wireless devices. However, DUT board circuit layout is limited by available user space, and the additional complexity of next-generation devices typically drives an increase in circuit area requirements.
Calibration layout becomes much more challenging and complicated due to varying trace lengths, switch losses, and variable triggering delays of the module's IQ DACs. In the multi-DUT scenario, each DUT's IQ orthogonality as well as the delay skew from DUT to DUT must be considered. This is especially true for triggered measurements and coherent sampling (Figure 5).
These additional DUT board design and layout complexities increase costs and lengthen development time. In some cases, the layout challenges may require multiple spins of the board, further increasing cost and negatively impacting time to market.
MIMO Adds Complexity
MIMO combines multiple coded RF signals with orthogonal frequency division multiplexing (OFDM) to increase data rates, improve QoS, and extend device range. MIMO devices increase test complexity by requiring more tester resources, more switches, and more board space to provide for all of the necessary calibration paths, which reach 16 paths per device.
Each of the 16 paths for each site requires a set of tester resources/DACs supplying the input baseband signals. The Quad-DUT simple IQ modulator shown in Figure 5 needed four RF pins and eight DAC/ADC pins; the same Quad-DUT Quad-band MIMO (4×4) device shown in Figure 6 needs 64 RF pins and 32 DAC/ADC pins.
In the single IQ modulator case, there was only one frequency to calibrate; in this modulated case, the test engineer has to calibrate the flatness of the entire channel. If the phase imbalance of the module is not linear with frequency, the calibration to correct for the imbalances will be limited and much less effective. The physical space requirements and layout problems for these more complex devices require a different approach that can eliminate the calibration paths and increase the potential device site count to more economical levels.
Also, MIMO devices often need system-level tests such as error vector magnitude (EVM). Instead of simple sinusoids, each IQ branch of the MIMO device is stimulated with an independent complex modulated waveform specific to the standard, such as 802.11abg, WiMAX, or 802.11n.
Any sort of cost-effective EVM, IQ constellation, modulation accuracy, and BER testing will use IQ modulation files and tester resource triggering. The test engineer must trigger all of the DACs to start sourcing the modulation at the same time. The test engineer also needs to trigger all of the tester's RF receivers to capture the output signals at the same time. This is done to properly align to the first symbol, after which the modulation calculations such as EVM can be performed.
So now, even if the test engineer has properly calibrated all 32 DACs, all frequencies, trace paths, and switching paths he will have to contend with trigger start and trigger delay issues, which will misalign the data and give erroneous results. Unlike the IQ phase and amplitude calibration, there is no simple, straightforward method to resolve this challenge.
Baseband test equipment is outfitted with low-frequency pins to source high-impedance differential signals, and RF modules have 50-Ω resistance pin RF receivers that operate at high frequency. You cannot simply connect the two together through a switch on the DUT board, trigger both of them sourcing a known training signal, and then measure all of the various delays. The delay may have to be inferred by performing two separate calibrations, one for each module, or the test engineer may need to implement a software algorithm alignment in lieu of hardware triggers, which will increase the test time and cost.
Thinking in the Box
The cost-effective alternative to complex DUT board solutions eliminates the user-created calibration relays and resolves most of the IQ alignment problems within the baseband instrument.
The analog instrument is itself designed for internal loopback self-calibration. All the test engineer would have to do is to follow standard rules in laying out PB traces, such as making them the same length and width, then use the automated Arb and digitizer calibration for the baseband instrument. This would substantially reduce the DUT board layout calibration burden on the test engineer and free up valuable space for multisite expansion. This solution can be achieved with negligible cost, and it provides a significant cost savings through reduced development time, reduced DUT board expense, and increased multisite throughput.
About the Author
Keith Schaub is an RF product and marketing engineer with Advantest America. He also is the author of the book Production Testing of RF and System-on-a-Chip Devices for Wireless Communications and several other wireless articles. Mr. Schaub has an M.S. in electrical engineering from the University of Texas. Advantest America, 3201 Scott Blvd., Santa Clara, CA 95054, 512-289-7647, e-mail: [email protected]