An arbitrary waveform generator (Arb) can be seen as a reversed version of a real-time DSO. Both instrument categories share the same theoretical principles applied to sampled signals. There are, however, some architectural distinctions that have resulted in huge differences in terms of sampling speed and analog bandwidth (BW) between these two kinds of instruments.
Traditionally, the performance level of DSOs has been around one order of magnitude better than that of Arbs. Some differences have to do with the hardware architecture, with the use of the ADC interleaving technique being one of the most important. ADC interleaving allows increasing the sampling speed by using multiple lower-speed ADCs connected to the same signal with the right timing.
Other differences are related to some signal-processing tricks applied to the acquired signals. Equivalent-time sampling allows much higher equivalent sampling rates (Sr) when signals are repetitive or when only statistical time and amplitude information is relevant for the test, such as eye diagrams of serial data signals.
The use of similar techniques in Arbs has been difficult or impossible until very recently. The latest generation of ultra-high-speed Arbs reaches Sr >20 GS/s and analog BWs >9 GHz using 12.5-GS/s DACs (Figure 1). These Arbs are opening new areas of application such as the direct generation of ultra-wideband (UWB) signals or the latest types of high-speed serial data interconnections. Reaching such levels of performance is possible thanks to the improvements in circuit design and the application of new advanced DAC interleaving techniques.
Principles of DAC Interleaving
DAC interleaving basically consists of using two or more DACs working at a relatively low Sr to generate a signal as if it were created by a higher Sr device. Ideally, a switching device connects the output of each DAC to the instrument output following a precise timing sequence. It is quite straightforward to realize that the instrument output will be equivalent to a higher speed DAC so the equivalent Nyquist frequency will be increased accordingly.
Analog BW for each DAC may be lower than that of the final output since the switching device effectively increases it. Implementing such architecture in actual devices is very difficult due to the lack of switching devices with the right performance at switching frequencies >10 GHz.
Real-world implementations follow a simple approach of adding the output of two lower speed DACs. Interleaving is accomplished by shifting the conversion clock by one half of the common sampling interval for the individual DACs (Figure 2). The question now: How can the linear addition of two BW-limited signals result in a new higher BW, higher Sr signal?
BW is limited at the output of each DAC for a series of reasons:
•?Each device and the output circuits attached to them will show a given analog BW.
•?The zeroth order hold response of actual DACs will display a sin(f)/f frequency response with a zero located at Sr frequency.
•?Usable DAC BW will be limited by the sampling theorem so aliasing-free signals will be limited to the 0 to Sr/2 (Nyquist) frequency range.
Linear addition of such signals cannot improve the effects of the linear BW limitation so the zeroth-order hold and analog BW effects will stay after the combination of the signals. It is the switcher, a nonlinear device, which is accountable for the increase in both the analog BW and zeroth-order hold response in the ideal DAC interleaving architecture.
So, what is the gain of using the linear addition approach? The gain comes from the behavior of the Nyquist frequency. Some math is required to see why this happens. To provide a simpler explanation, it is better to move into the frequency domain. First is the classical equation in the frequency domain of an ideal sampled signal:
Equation 1
For a more realistic zeroth-order hold DAC behavior, Equation 1 must be modified:
Equation 2
The frequency-domain behavior of the sampled signal may be seen as the superposition of the original nonsampled signal spectrum and all the images located around multiples of the sampling frequency. To avoid the superposition of any image on the baseband spectrum and the subsequent unrecoverable loss of information, the original signal BW must be limited to Sr/2. Under these conditions, the original signal may be replicated by applying a brick wall low-pass filter to the DAC output to remove all the images.
In a two DAC interleaved system, alternate samples of the original signal are applied to each DAC. If we take Equation 2 for DAC #1, DAC #2 frequency domain contents can be expressed as
Equation 3
Equation 3 can be understood easily if values are given to the additional term introduced by the ½ Sr delay. Images will keep the same sign for even values of n, including 0, while they will reverse it for odd values of n.
When signals coming from both DACs are added together, images with opposite signs will cancel each other and the resulting spectrum will be the same as would be obtained from a single DAC running at twice the sampling speed if the effects of zeroth-order hold response and analog BW are taken out. As a result, it is possible to generate signals with frequency components located beyond the Nyquist frequency for the individual DACs.
DAC interleaving also results in a signal-to-quantization noise ratio (SQNR) improvement. Quantization noise from both DACs is uncorrelated so total noise power doubles while signal power quadruples. As a result, SQNR is improved by 3 dB just as expected in an ideal DAC running at twice the speed.
Although linear DAC interleaving effectively doubles the equivalent Nyquist frequency, usable BW does not improve as much. The main reason for it is the sinc(f) response caused by the zeroth-order hold response of the participating DACs. An interleaving DAC shows a 10.4-dB attenuation of signal components at 75% of the equivalent FNyquist while a noninterleaving DAC will have an attenuation of just 2.1 dB at the same frequency.
Applying a combination of analog reconstruction filters and digital pre-emphasis of the incoming signal can be used to compensate for some of the effects of zeroth-order hold. Arbs allow users to set virtually any sampling speed, but reconstruction filters typically are limited to a few low-pass filters which are far from the ideal 1/sinc(f) shape because they typically do not show any emphasis at high frequencies.
Correcting the signal by applying digital pre-emphasis, although feasible, results in lower amplitude signals and a worse-than-expected SNR ratio since some of the precious DAC dynamic range must be spent to accommodate the higher amplitude, high-frequency signal components. DAC analog BW also adds to this problem so a fast rise time becomes a very important feature of suitable converters for the interleaving architecture.
The DAC interleaving technique can be implemented internally in a two-channel Arb or by using two independent Arbs synchronized accordingly. Single instrument implementations are easier and more accurate because sample interleaving, clock synchronization and delay control, signal addition, and combined operation are transparent to the user.
Impairments
Linear DAC interleaving tricks require good timing and amplitude accuracy to work properly. Any deviation from the ideal half-sample time delay or amplitude imbalance between the participating DACs will result in a nonperfect cancellation of the unwanted signal images. Spurious images will show up, and because they will be located within the Nyquist band, the images will interfere with the wanted signal. Differential amplitude and phase response over frequency result in the same effect.
The impact of such effects will greatly depend on the application. UWB-Multiband OFDM Alliance (MBOA) signal generation is a good example. Generating such signals is one of the applications made possible only by the latest generation of ultra-high-speed Arbs incorporating the DAC interleaving technology. The combination of signal BW and band location makes necessary Sr well over 20 GS/s to cover all the band groups as defined by the WiMedia standard.
More traditional approaches based on state-of-the-art vector signal generators do not allow the generation of hoping signals since modulation BW is limited to around 1 GHz. Ideally, the Sr should be carefully selected so that no band will include the Sr/4 frequency. When not done in this way, any amplitude or timing imbalance will show up as the signal interfering with itself, reducing the signal modulation quality and worsening the signal error vector magnitude (EVM) performance.
Improving Performance and Accuracy
The DAC interleaving architecture potentially improves the performance of high-speed Arbs by extending the usable frequency range. However, some real-world impairments such as timing skew of the conversion clocks applied to the individual DACs degrade the overall performance.
Additionally, the DAC interleaving strategy does not change the zeroth-order hold behavior in the frequency domain of the participating DACs. This behavior results in a null located at Sr frequency, which now is the new Nyquist frequency of the combined conversion system.
Generating good quality signals with frequency components close to Sr may be difficult because those components will be greatly attenuated. All these issues make it necessary to develop correction techniques to really obtain a gain in terms of performance while keeping good signal quality.
Using a switching device to shift the frequency of the null to 2 x Sr is unpractical so a different strategy must be put in place. One of the possible solutions is using a different DAC architecture where the analog level for each sample is kept for half a sampling period and set to zero the other half.
This return-to-zero (RZ) method also is known as zeroing (Figure 3). Halving the active part of the sample doubles the frequency for the first null reaching 2 x Sr. Ideally, two interleaving DACs with a perfect half-sample delay and using the zeroing method are equivalent to a single DAC running at twice the speed or using an ideal switching device.
Keeping the actual behavior of such a system close enough to the ideal one is a real challenge. Unwanted spikes are generated when time alignment is not perfect. Additionally, nonlinear effects due to slew-rate limitations will show up easily because continuous, extremely fast transitions are involved in the process.
Finally, the combined amplitude of the output signal will be reduced by 50% since only one of the DACs is active at any time. Although zeroing extends the usable frequency range, it does not improve the analog frequency response.
Signal quality in DAC interleaving Arb systems greatly depends on how well both DACs are paired and aligned at all levels: timing, amplitude, and frequency response. Reaching the required level of matching over the required frequency and temperature ranges and time is difficult. This is only possible if the right correction algorithms are applied to the system.
Obtaining those correction factors requires careful calibration at the factory and in the field.1 Proper calibration accurately assesses the absolute and differential amplitude/phase response over the expected signal frequency range for each DAC.
Once obtained, these correction factors must be converted into filter coefficients that should be applied to each set of odd and even samples separately (Figure 4). The linearly distorted signals also will compensate for moderate shifts of the ideal half-sample delay to improve nulling of the unwanted images so overall signal quality is improved.
The same calibration process can be used to improve the flatness and phase linearity of the system. Generally speaking, it is not possible to simultaneously null tones from both unwanted images since correction factors for them would be different because they are located at different frequencies.
The final correction factors may be selected to optimize some specific signal parameters such as spurious-free dynamic range (SFDR) or EVM for UWB signals. Current state-of-the-art real-time DSOs with BWs >20 GHz and extremely flat amplitude/phase responses are ideal for this task although spectrum analyzers also are usable with some limitations.
DAC Interleaving Enables New Arb Applications
The combination of higher speed DACs with the use of interleaving techniques makes it possible to address new application areas previously not covered by arbitrary waveform generators. Two good examples are the direct generation of wideband RF signals and high-speed serial data.
Generating wideband RF signals always has been challenging because keeping good signal quality using traditional generation methods may be extremelly difficult. Additionally, traditional methods such as direct quadrature modulation or IF up-conversion show limitations regarding the available modulation BW, image rejection, and flatness.
As an example, most current WiMedia (UWB-MBOA) signal-generation solutions based on the combination of a two-channel baseband generator and a quadrature modulator cannot produce fully compliant test signals including band hoping because they do not have the right combination of modulation and baseband signal BWs. Fully compliant WiMedia signals require >1.5 GHz of modulation BW while frequency components of the signal can reach up to 10.6 GHz or Band Group #5.
WiMedia signals consist in a sequence of wideband OFDM symbols (528-MHz BW) hoping among up to three adjacent bands, a band group. Several band groups have been defined by the standard. Current state-of-the-art DACs used in high-speed Arbs, capable of generating samples at a rate of 12.5 GHz, could only accommodate the two lower frequency Band Groups #1 and #2.
The use of the DAC interleaving technique extends the Nyquist frequency to 12.5 GHz so all the possible band groups can be effectively generated when proper signal enhancement procedures such as zeroing and frequency response correction are applied. Frequency response calibration is extremely important because signal flatness is far from ideal
(Figure 5).
High-speed serial data generation traditionally has been addressed by dedicated pattern/data generators where users have little, if any, control of signal parameters or impairments.2 On paper, Arbs could offer a better solution as all aspects of the waveform including amplitude, noise, jitter, crosstalk, or Inter-Symbolic Inteference (ISI) can be fully emulated and controlled by the user.
Direct control of the waveform allows for signal-path emulation or flexible application of signal enhancement techniques such as de-emphasis. However, today’s standards for serial data transmission require analog BWs and Sr beyond the capabilities of current DAC technology.
Proper serial signal generation needs sufficient BW and Sr and a good signal fidelity so unwanted signal impairments do not show up. Depending on the application, obtaining proper serial data signals requires generating frequency components up to the 3rd or 5th harmonic of the fundamental frequency of the signal.
Mainstream serial buses such as the PCI Express Gen 2 with 5-Gb/s data rates require generating BWs >7.5 GHz while SATA Gen. 3 at 6 Gb/s needs almost 10 GHz. Those BWs imply Sr >15 GS/s.
DAC interleaving is, again, the only available technique allowing for such performance today. Signal correction after calibration must be put in place to compensate for the Arb’s frequency-domain response including cabling. Without it, attenuation of the high-frequency components of the signal and unwanted ISI would result in the degradation of the eye diagram.
Conclusion
The DAC interleaving technology has opened the door to a new generation of Arb with effective sample rates >20 GHz. Combining this technique with some architectural improvements such as zeroing has made possible the direct generation of UWB or high-speed serial data signals with frequency components close to 10 GHz.
Using the right calibration and correction techniques could take this technology into the mainstream. Performance and signal quality levels could be improved and obtained repeatedly even when the architecture is extended beyond the two DAC systems currently implemented.
References
- “Creating Calibrated UWB WiMedia Signals,” Tektronix, Publication No. 76W-20861-1.
- “Direct Synthesis Comes to the Aid of Serial Measurements,” Tektronix, Publication No. 76W-19777-0.
About the Author
Joan Mercadé is a telecommunication engineer who graduated from the Polytechnic University of Catalonia, Barcelona, Spain. He has been working in different areas of the test and measurement industry for more than 20 years in companies like Philips and Tektronix. Currently, he is general manager of Arbitrary Resources, his own R&D and consulting company. e-mail: [email protected]
December 2009