Arm Custom Instructions allow chip designers to add instructions to the usual complement found in the Cortex-M microcontroller family. This builds on the Arm-v8M architecture that includes the secure Arm TrustZone technology found in the Cortex-23 and Cortex-M33 processors. New instructions could enhance any application, but machine learning (ML) applications are an obvious choice. The Cortex-M platform has had some ML enhancement already, but these tend to extend arithmetic support to formats and matrix operations that are part of the Helium M-Profile Vector Extensions.
“A world of a trillion secure intelligent devices will be built on a diversity of complex use cases requiring increased synergy between hardware and software design,” said Dipti Vachani, senior vice president and general manager for Arm’s Automotive and IoT Line of Business, at Arm TechCon. “We have engineered Arm Custom Instructions to fuel closer hardware and software co-design efforts toward achieving application-specific acceleration while unlocking greater device differentiation.”
The Arm Custom Instruction support covers the complete design and deployment flow (see figure) from design and incorporation of instruction-related IP to compiler and debug support. This type of extension isn’t unique to microcontroller IP. Platforms like RISC-V, Cadence’s Tensilica, and MIPS all have supported custom instructions, but this is uncharted waters for Arm, which has been able to force its customers to deliver compatible platforms. The new option still restricts the base to be the same, so any application targeting the base instruction set will run on any Cortex-M processor.
Arm provides the complete design and support flow for delivering microcontrollers with additional instructions over and above those in the Cortex-M.
There are usually two reasons for adding instructions: increase performance and/or reduce power requirements by providing more efficient operations. Both are useful for microcontroller applications.
Though most types of applications that can benefit from instruction extensions, the amount of enhancement needs to be balanced with the costs. These costs don’t just include the support provided by Arm to integrate custom IP—they also cover the additional training and long-term support. The tradeoff between using a stock microcontroller, a standard Cortex-M chip, or one with an extended instruction set is something that companies will continue to deal with. The latter simply provides designers with more options.
Designers have always had the option to enhance a Cortex-M using peripheral accelerators. The difference is code and communication efficiency. A peripheral requires movement of data and operation initiation by an application. A single custom instruction is able to do more than multiple instructions with an accelerator. An accelerator can be more efficient when dealing with streams of data or where shared memory may allow an accelerator to operate in parallel with a processor. However, this adds complexity to a chip. Custom instructions can also be complementary to an accelerator.
The custom instruction support doesn’t extend to the higher-end Cortex-A platform. It’s unlikely to be added any time soon because Cortex-A platforms are more sophisticated when it comes to memory support, including virtual-memory and virtual-machine support.
It will be interesting to see how this new design option is used. Lots of companies already design their own microcontrollers or incorporate one or more Cortex-M processors in a multicore SoC. Many of these will be employed only within a company that limits the support requirements while providing a higher-performance or more-efficient platform than available to their competition.