Driving Next-Generation Digital Head Units for Automotive Applications

May 1, 2006
By sharing both internal and external memory resources, this article shows that a system-on-chip (SoC) dual-core MCU+DSP architecture reduces chip count, system cost and messaging complexity in a multimedia system.

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As new media technologies emerge in home and handheld consumer electronics devices, today's drivers demand similar user experiences in the car. To stay competitive with in-car media, OEM's must create flexible and scalable solutions to keep up with the rapidly changing market. Programmable solutions are becoming increasingly important to address these needs, and a soft-ware-configurable digital architecture enables the easy introduction of new features and functions, therefore, reducing product development time.

The cost pressures and the competition for valuable vehicle center-stack real estate has taken a toll on entry-level head unit suppliers, but customers are willing to pay a premium for higher-end car head units. Suppliers who offer a common platform with a scalable portfolio of basic to premium features enable reuse of designs across product lines, reducing development costs and allowing dedication of resources on more advanced applications.


Digital technology is replacing analog components in automotive radios, substantially lowering equipment costs and providing added benefits to the listener and broadcaster. Programmable digital signal processing (DSP) technology has been used in radio head unit reception and audio-processing paths for some time. DSPs have eliminated the need for costly, high-performance analog components, improved the quality of broadcast radio through advanced digital reception techniques, and eased radio system design by shifting product development from a rigid hardware design to a flexible software environment.

Considering the lengthy automotive product development cycle and the rapid adoption of new digital media technologies outside of the vehicle, it is difficult for automotive planners to forecast what media features will be in demand by the time products go to production. Perhaps the most important benefit of moving to a software-configurable digital architecture is the relative ease with which new features and functions can be introduced to entertainment and radio head units. The introduction of digital content — such as MP3 and Windows Media Audio (WMA) compressed audio files — has expanded the most basic set of features users expect of their CD-playing car radios. For example, MP3 playback support is becoming a standard item for many head units, just as video and speech applications will be in the coming years. As the amount of digital content continues to grow and the types of digital storage and media formats proliferate, car entertainment systems need increasing flexibility to handle such diverse content sources.


Scalability plays a critical role in automotive radio applications. The downward market cost pressures and fierce competition for the valuable vehicle center-stack real estate has eroded profitability for entry-level radio suppliers. However, establishing a position for basic functionality opens the door for supplying more profitable systems with enhanced features. Compelling, enhanced functionality encourages customers to pay a premium for higher-end car head units. Suppliers who deliver a common platform, whose features scale from basic to premium, can then benefit from the level of hardware and software development effort that can be re-used across their product line.

For example, using the same programmable signal processor resources of the AM/FM DSP, developers can add enhanced audio post-processing, speech-enablement, and compressed audio and/or video decoding depending upon the features required.

The demand for automotive digital multimedia features will increase as consumers become more entrenched in today's “digital lifestyle.” Transferring and playing their personal digital media content from a PC, home set-top box or handheld device is available today and will soon be expected in the car. One example is MP3 playback from a CD-R. Supported first by PCs, DVD players and portables, it is available in today's head units. The next generation of these automotive systems promises to support a multitude of larger mass storage devices — including hard disks, USB and flash drives — thus enabling users to bring in, or potentially store, their entire media collections in their vehicles. This increase in size and number of sources of content, as well as the support of content downloading options, will require increased general purpose processor (GPP) performance.


Digital media processing re-quires significantly more performance than is available from traditional automotive microcontrollers (MCUs). GPP architectures with enough performance to handle the MCU functions and real-time digital media decoding concurrently are too expensive or power hungry for most car radio applications. Consequently, the architecture of choice for many automotive electronics suppliers is a lighter-weight MCU, providing sufficient baseline capability and augmenting it with a DSP to perform high-performance tasks, such as receiving AM/FM or decoding compressed digital content. Completing the base architecture includes having enough RAM and embedded Flash for each processor (Figure 1), as well as a tuner, media storage controller (e.g., a disk drive, removable Flash, etc.), and possibly a connectivity port, such as USB.

With the rising volume of media-enabled radio applications, semiconductor manufacturers have developed system-on-chip (SoC) devices specifically for radio and entertainment head unit products. These SoCs merge MCU, GPP and DSP functions with application-appropriate peripheral sets and memory configurations onto single chips tailored for multimedia-enabled automotive systems.

Perhaps the most significant benefit of a GPP+DSP dual-core SoC architecture is the ability to scale a baseline design to serve different market segments. SoC families often offer a variety of speed and on-chip memory configurations. Software- compatible SoC devices give product line developers an appealing option to increase the system-processing capacity by exchanging an SoC for a higher-performance member of the same family. This way, developers are able to create a baseline system that scales up from the low end with minimal hardware redesign. Adding new system functions on top of basic functionality can become as simple as new software loads for the GPP and/or DSP.


To the driver, the most valuable aspect of an automobile entertainment system may be its ability to occupy other passengers during particularly mundane travel. The personalization enabled by the digital lifestyle will drive vehicle passengers to want their specific personal media content, and that applies to the driver, too. Why can't the kids get their music or movies and the driver listen to his or her MP3s, too? What if the same compressed song burned to a CD and thumb-drive didn't play exactly the same? Or, perhaps, it didn't work at all from one of the sources? If a single decoding engine capable of playback from several data sources (CD, HDD, USB, etc.) is used, then, independent of which source, the same file would play back identically. To be worthy of being called an automotive-grade system, some guarantee of uniformity in playback needs to be made. A DSP-based centralized decoding architecture can offer that.

With only a modest amount of additional DSP performance, the centralized decoding architecture can be extended to support the concurrent playback of multiple content sources to several listening/viewing zones. Unlike the home or portable environment, the multisource, multiformat, multizone paradigm is a unique challenge for automobile entertainment systems providers. And, it doesn't have to be solved by bringing additional portable systems into the vehicle.

Increased processing performance also is required to support what may be the simplest model for downloading content to a head unit. In this case, the head unit encodes a CD onto its local drive the first time the disc is played. Functionally, the head unit would appear to play music from the CD. However, internally, it would encode each track into a compressed format, such as MP3 or WMA, as fast as possible and play back the encoded version for the user. If the encoding speed is fast enough, the user experience can be comparable to that of using a CD changer. Compared to MCUs or GPPs, DSPs are particularly well-suited for performing the high-speed encoding of digital audio and video. After the CD has been “imported” to the head unit, the user never needs to insert that CD again to listen to it.

While a feature like this can mirror the home/PC experience and improve the in-vehicle user experience, the technology also can be applied to reduce system cost. Certainly, compressing the audio reduces the cost of storing songs, but the opportunity goes beyond that. For example, using high-speed encoding and enough low-cost non-volatile memory instead of a hard disk, a high warranty return item or the multidisc CD changer, could virtually be replaced at a lower cost and yield greater reliability.


Another advantage of moving to an integrated, system-level, dual-core architecture in a car head unit is a reduction in system complexity and component count. By integrating the required application-specific peripherals on-chip, decreasing the number of power supply buses required and using a unified memory architecture, GPP+DSP dual-core SoC devices offer several opportunities to reduce development costs and bill of material (BOM) costs.

Absorbing the functions of the most common components in automotive entertainment systems is a fairly straightforward strategy for component count and cost reduction. Sufficient on-chip, enhanced audio and video capabilities, as well as popular automotive network interface support, are a must. The challenge for SoC vendors is providing appropriate scale to cover low-cost and high-end systems across the diverse regions of the world. Another challenge with the design is to expand the peripheral set, while maintaining post-integration software re-use without reserving costly additional pins on the package.

An often overlooked benefit of this level of integration is the reduction it enables in power supply buses, routing and complexity. Reducing the number of components on the board generally reduces the amount of current required, as well as simplifies the PCB power routing. The reduction in number of supply rails and the amount of current sourced has a definite, positive impact on the complexity of the system level power supply design.

A GPP+DSP co-processor architecture (Figure 2) requires separate external memory resources for both the GPP and DSP. However, with a dual-core SoC, the entire memory map — internal and external — may be shared by the two cores as shown in Figure 3. The overall system memory footprint can be reduced when code is stored in a single common device and when data structures can be shared between cores by passing pointers to common memory locations. This architecture eliminates superfluous memory allocations and reclaims precious CPU cycles associated with copies and block moves.

Typically, in a two-chip GPP and DSP architecture, each processor has its own dedicated memory. In a typical usage scenario, the MCU handles the communications protocol for networks like controller area network (CAN), and connectivity ports, such as USB. Digital content sources are pre-processed by the GPP and then passed to the DSP for decoding. Any local buffering in the GPP memory that also must be copied to the DSP memory is unnecessary and wasteful of memory and CPU cycles. However, in this two-chip architecture, it is unavoidable.

In contrast, a GPP+DSP SoC architecture can use a shared memory architecture. Digital content sources can be pre-processed by the GPP as before, but upon completion, the DSP is notified and pointed to the location in its own memory map of the data to process. The integrated memory architecture of a dual-core SoC device also eliminates the need for complex communications schemes between cores, reducing software design complexity and potentially decreasing overall memory requirements and system processing latency. The shared memory serves as an efficient communication mechanism between the GPP and DSP cores. The GPP can pre-process and place the incoming data source directly in shared memory without interrupting the DSP. Then, when the DSP is ready, it loads the data from the appropriate buffer. Compared to a GPP with DSP co-processor architecture, the SoC architecture eliminates additional data copies between the cores, thus eliminating superfluous memory allocations and reclaiming precious CPU cycles from block move operations.

Additional cost savings can be gained by unifying and minimizing the non-volatile code storage requirements for each core. Rather than using an independent memory device for each core, a single chip may be used to store code for both processors with one of the cores responsible for booting and loading the other.

As a consequence of sharing internal and external memory, for storage and at run-time, the system will require less overall memory, which may translate to fewer discrete memory devices. This shrinks product size, cost and power consumption. It also simplifies board design and electromagnetic interference (EMI) considerations that arise with high-speed memories.


Particularly challenging for automotive OEMs is working within the long design cycles typical of the industry — upward of three years. The mechanisms for encoding, delivering, playing and protecting digital content are still highly volatile, as standards continue to change and new standards arise. Choosing which formats will dominate the market three years from now and designing radios around them is simply too risky a decision at this stage. Additionally, it is probable that these formats will have evolved in that time — new radios offering three year-old technology will not have much user appeal.

For this reason, choosing an architecture with a programmable DSP is critical to keeping car entertainment designs adaptable and up-to-date. Therefore, when a radio head unit is ready to be programmed during production, new features and functions, such as the latest audio formats or connectivity options, can be loaded at that time. Additionally, existing radios in the field can be upgraded as code is enhanced and standards evolve.

By working with companies and in industries that tend to lead with digital technology in consumer electronics, such as the portable media player market, Texas Instruments and its extensive third-party network are able to develop, test and prove emerging consumer electronics standards before the auto-motive industry needs them. In this way, the automotive industry is able to approach head unit design from a functional perspective. Since much of the development and integration required to implement these formats has been completed and proven in other high-volume markets, automotive developers can implement head unit design quickly by leveraging these solutions.


Programmability also gives developers a hedge against changes in consumer habits. For example, the wide range of portable multimedia players continues to stretch how users interact with content. Many audio players now provide image viewing and limited video playback. Speech-recognition system features for in-car command and control capabilities (i.e., “Set temperature to 74 degrees”) dovetail particularly well with the hands-free operation being pursued for built-in navigation systems, Bluetooth cellular phones and entertainment modules. DSPs are particularly useful for echo cancellation, noise reduction and voice feature extraction. The flexibility of this programmable, GPP+DSP architecture also lends it-self to capturing more overall functionality within the vehicle. For example, a radio head unit that can provide hands-free capabilities for controlling the air-conditioning and heating system and tuner also can provide these capabilities to other subsystems within the car by extending the control vocabulary. By using the integrated CAN interface, the SoC enables a rather straight-forward integration of capabilities to the existing car systems.

Dual-core SoC architectures have already proven themselves in many industries by enabling smaller products at a lower cost with less power consumption. Moving to a dual-core SoC architecture from an MCU and DSP architecture actually simplifies design, since the architecture is fundamentally the same system integrated into a single chip. Additionally, developing code for both cores can be completed in a single development environment instead of two separate tool suites. With the introduction of automotive-specific SoC devices such as TI's automotive infotain-ment technology, OEMs will be able to provide a better user experience for reduced cost and higher reliability.


Brian Fortman is the worldwide marketing manager for Automotive Infotainment division of Texas Instruments Inc.


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