Infineon And ASE Agree To Semiconductor Packaging Tandem

Nov. 12, 2007
Infineon Technologies and Advanced Semiconductor Engineering Inc. (ASE) have announced a partnership to construct a new semiconductor package form boasting a 30% reduction of dimension compared to conventional lead-frame (laminate) packages.

Infineon Technologies and Advanced Semiconductor Engineering Inc. (ASE) have announced a partnership to construct a new semiconductor package form boasting a 30% dimension reduction compared to conventional lead-frame (laminate) packages.

Infineon will contribute its embedded WLB (eWLB) technology to the partnership, while Advanced Semi will pitch in its packaging expertise. eWLB extends the benefits of wafer-level ball grid arrays (WLBs) in that it keeps the small dimensions and electrical and thermal protection, but augments functionality and application spread. This technology also allows additional solder contacts to be added to the chip as needed. Also eWLB adds wiring area around the chip, which will pay dividends when new, space-sensitive applications hit the market.

“We will use our development to set the stage for future package generations and are responding to future market demands and keeping Moore’s Law in mind. As smaller pattern sizes and increasing performance require new, innovative approaches,“ said Prof. Dr. Hermann Eul, member of the Management Board of Infineon Technologies AG and head of the Communications Solutions Business Group. “Our trend-setting package technology sets the benchmark in integration level and efficiency. Together with ASE, we pave the way to providing the industry and end consumers with a new generation of energy-efficient, high-performing mobile devices.”

The new packages will be manufactured in Infineon and ASE plants under a license model. They are scheduled to hit markets late 2008.

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