Extraction Tool Makes Grade On TSMC’s 45-nm Process

June 18, 2007
Cadence Design Systems’ QRC Extraction tool now handles parasitic extraction for designs targeted at TSMC’s 45-nm process technology. The 45-nm node presents typical advanced technology challenges, including aggressive design rules, smaller SRAM cells,

Cadence Design Systems’ QRC Extraction tool now handles parasitic extraction for designs targeted at TSMC’s 45-nm process technology. The 45-nm node presents typical advanced technology challenges, including aggressive design rules, smaller SRAM cells, and higher gate density. As process technology scales down to 45 nm, manufacturing effects impact design-for-manufacturability considerations that must be addressed by accurate extraction technology to ensure reliable designs.

TSMC has validated that QRC Extraction provides accurate handling of 45-nm manufacturing effects. Cadence QRC Extraction supports designers in high-growth IC markets, such as consumer electronics, mobile devices, RFID, and wired/wireless networking systems. Designers who need highly accurate extraction for fast and complex wireless SoCs and RFICs can now use the Cadence QRC Extraction tool with TSMC’s 45-nm process technology.

According to TSMC spokesmen, QRC Extraction achieves high silicon correlation between measured and extracted results.

Cadence Design Systems
www.cadence.com

TSMC
www.tsmc.com Cadence Design Systems’ QRC Extraction tool now handles parasitic extraction for designs targeted at TSMC’s 45-nm process technology. The 45-nm node presents typical advanced technology challenges, including aggressive design rules, smaller SRAM cells, and higher gate density. As process technology scales down to 45 nm, manufacturing effects impact design-for-manufacturability considerations that must be addressed by accurate extraction technology to ensure reliable designs.

TSMC has validated that QRC Extraction provides accurate handling of 45-nm manufacturing effects. Cadence QRC Extraction supports designers in high-growth IC markets, such as consumer electronics, mobile devices, RFID, and wired/wireless networking systems. Designers who need highly accurate extraction for fast and complex wireless SoCs and RFICs can now use the Cadence QRC Extraction tool with TSMC’s 45-nm process technology.

According to TSMC spokesmen, QRC Extraction achieves high silicon correlation between measured and extracted results.

Cadence Design Systems
www.cadence.com

TSMC

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

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