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Multiprocessor Packs 24 Cores

Unveiled as the Scalable Embedded Array (SEA) platform, the SEAforth-24 chip integrates 24 core processors, each of which is capable of operating at one billion instructions per second. In a typical application, power dissipation is a mere 150 mW. The device combines a 6x4 array of 18-bit processors with a set of I/O functions and employs a dual-stack architecture that is both asynchronous and scalable. Capable of wireless operation, the chip can drive an antenna directly, eliminating the need for external data converters. Other features include 512 words of RAM and ROM on each core, a flash memory interface to ripple-load application code into cores at boot up, static/dynamic RAM interface, real-time clock support in each core, an 18-bit ADC and 9-bit DAC, 11 SPI ports that can double as I2C, I2S, and USB ports, 32 parallel I/O lines with handshaking, and scalable connectivity among multiple SEAforth-24 chips via I/O ports. Programming is via the VentureForth language, a RISC version of the Forth language. Available in a 240-pin BGA package, the first SEAforth-24 chip will begin shipping in the fourth quarter. Price is $19.95 each/1,000. INTELLASYS CORP., Cupertino, CA. (408) 446-4222.


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TAGS: Digital ICs
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