ESL Platform Looks To Solidify Baseband PHY Design Flow

Sept. 30, 2008
When it comes to the design of the physical layers of communications systems, and in particular the related algorithms, there is a paucity of design tools that are squarely focused on the tasks at hand. While there are good general-purpose math-oriented t

When it comes to the design of the physical layers of communications systems, and in particular the related algorithms, there is a paucity of design tools that are squarely focused on the tasks at hand. While there are good general-purpose math-oriented tools with which to get started on baseband algorithms, there is only a disjointed flow for designers undertaking physical-layer development.

After its acquisition of Elanix and its SystemView ESL design environment, Agilent began laying the groundwork for a new product based on that heritage. The result is SystemVue 2008, which represents an entirely new product focus for Agilent’s EEsof division. With SystemVue 2008, Agilent hopes to provide a tool with which baseband design teams can develop algorithms more quickly and verify them in less time. The ambitious goal is to halve the time it takes to design the physical layer of products such as software-defined radios (SDR), and to do so in a non-disruptive fashion that fits within existing methodologies.

In the past, baseband design teams have been plagued with multiple manual handoffs of their design work at every phase of the development cycle. This typically begins at the highest levels of abstraction, where system architects hand a functional specification on paper to lower-level teams for implementation. What this can lead to is over-specification of product performance at this high level of abstraction, which places high expectations on the lower-level designers to meet specs that may or may not be warranted. The cost of over-specification, which can come in terms of money, time, space, power, and/or complexity, can be avoided in Agilent’s view if a more efficient job of engineering can be done at the higher levels of abstraction.

To this end, SystemVue 2008 is built from the ground up for the task of PHY layer design. Operating at a level of abstraction above RTL, the tool links algorithm exploration and design partitioning to the designs of both the baseband and RF architectures (see the figure). It does so by supporting language constructs for both VHDL and Verilog. Agilent believes that this approach can be of help to developers of SDRs, as well as PHY development of both long term evolution (LTE) and mobile WiMAX systems with an additional focus on multiple-in multiple-out (MIMO) systems.

An important feature of SystemVue 2008 is the under-the-hood simulation engine, which is in orders of magnitude faster than math-only simulators and deals with baseband signals in their native format. In addition, the tool offers a standard Windows interface with the usual menus, toolbars, and basic schematic-editing capabilities that makes for ease of use. Algorithm developers tend to hand-code their mathematical scripts in tools with native language capabilities. SystemVue 2008 offers a multi-language modeling front end that supports C++, m-code, HDLs, and SystemC. The front end is hitched to an interface and graphical user interface (GUI) that allows them to code in the fashion they are accustomed to. Further, the tool is able to switch between GUI- or text-based models in either m-code, C++, HDL, or native compiled. It offers in-line algorithmic modeling using C++ or math language.

SystemVue 2008 offers fast algorithm prototyping through use of fixed-point libraries for performance analysis and optimization. Designers can also incorporate their own fixed-point models and/or HDL. The tool can then generate VHDL or Verilog that is fully synthesizable for FPGA prototyping or ASIC implementation.

Agilent SystemVue 2008 is expected to be available in November 2008, with prices starting at about $14,000.

Agilent EEsof
www.agilent.com/find/eesof-systemvue

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