Indian Engineers Offered Program In VLSI Design

Sept. 14, 2007
University of California at Santa Cruz Extension (UCSC Extension) has partnered with India-based TTM Institute of Information Technology (TIIT) and the Indian arm of Cadence Design Systems to open an additional certificate program in VLSI design engineeri

University of California at Santa Cruz Extension (UCSC Extension) has partnered with India-based TTM Institute of Information Technology (TIIT) and the Indian arm of Cadence Design Systems to open an additional certificate program in VLSI design engineering in New Delhi following success of branches in Hyderabad and Bangalore. The training program supports a growing semiconductor industry in India by bringing students first-class technology experts, curriculum, and EDA tools. Students must complete the program's required courses with a minimum GPA of 3.0 to be awarded the certificate in VLSI design engineering (physical design or logic design) from UCSC Extension in Silicon Valley. TIIT has trained more than 700 VLSI professionals since its opening in 1999. UCSC Extension provides professional development and continuing education courses to the Silicon Valley region and beyond.

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