PSMA Publishes 'Current Development in 3D Packaging With Focus on Embedded Substrate Technologies'

May 6, 2015
PSMA Publishes 'Current Development in 3D Packaging With Focus on Embedded Substrate Technologies'

The PSMA (Power Sources Manufacturers Association) Packaging Committee announced that it has published a report titled "Current Developments in 3D Packaging With Focus on Embedded Substrate Technologies." The first comprehensive study on using embedded substrate technology for building power sources, the report contains extensive research and product illustrations geared to an audience of technology executives and design engineers. Its purpose is to offer an in-depth industry perspective on how currently available materials and processes can be best used for the creation of advanced high-efficiency, high-power-density power products.

The PSMA created the 3D packaging report to address the pressing demands in the power industry to accelerate the development of higher density power sources. The first challenge arose from digital semiconductor packaging technology hitting a "cost barrier" brought about when advanced deep-submicron semiconductor technology could no longer reduce cost with the addition of more functions to the semiconductor die. This barrier was circumvented through the development of wafer thinning that enabled through-silicon-via (TSV) technology and the eventual introduction of 2.5D and 3D integration, which facilitated heterogeneous ("More than Moore") integration. This integration allowed the power requirements of the digital load to increase two to five times, within the same footprint, in a single generation. Now the power industry is tasked with finding ways news ways to package power sources that will meet this demand, but without increasing footprint.

In parallel, power semiconductor technology is facing a "construction barrier" that prevents the realization of the significant benefits new technology can offer in terms of increased power efficiency and higher power density.  These new technologies, including gallium-nitride (GaN), silicon-carbide (SiC), and gallium-arsenic (GaAs) power semiconductor devices, all require operation in a package that is free of bond wires and that minimizes parasitic interconnect elements. Both of these challenges can be addressed with power packaging utilizing embedded substrate technologies and are addressed in the report.

The PSMA's 340-page report, prepared under contract by LTEC Corporation with work subcontracted to Anagenesis and Fraunhofer-Institute, is based on the Packaging Committee's extensive research of over 750 articles and papers, analysis of 450 presentations/papers, and by conducting 30 industry expert interviews. Information was also derived from attendance at 10 industry conferences, workshops and seminars. The report contains 172 links and 394 citations.

The report provides detailed analysis of substrates (organic and inorganic), components (actives and passives), thermal management, high temperature die, packaging technologies, interposers, as well as additive manufacturing and laser fabrication. Each passive component (resistors, capacitors, inductors) has an entire chapter detailing which suppliers are currently shipping products usable in power sources.  Every chapter covers manufacturing issues and includes references to contract manufacturing companies already producing power products utilizing embedded substrate technology. Embedded substrate packaging leverages the large investment made by the digital industry in advanced packaging technologies and is being used to resolve the power source construction challenge. As the report demonstrates, 3D power packaging using embedded substrate technology is a disruptive technology, in that it enables large increases in power density and efficiency.

The PSMA report on 3D packaging will be provided free of charge to PSMA members.  Others interested in the report may order a copy from PSMA for $2,990.

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