Offered as the most complete family of zero-delay buffers, the Z9xxx family includes 11 devices that can be used to eliminate clock propagation delays and reduce noise in virtually all electronic systems. The devices offer a pin-to-pin output skew of less than 200 ps and jitter of less than 200 ps.The family operates on 3.3V and can handle frequencies up to 150 MHz. Each chip contains a phase-locked loop and uses a bank architecture on its outputs that allows groups of outputs to be programmed with higher or lower frequencies than the master clock.
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