Zero-Delay Buffers Suit Virtually All Systems

Feb. 1, 2000

Offered as the most complete family of zero-delay buffers, the Z9xxx family includes 11 devices that can be used to eliminate clock propagation delays and reduce noise in virtually all electronic systems. The devices offer a pin-to-pin output skew of less than 200 ps and jitter of less than 200 ps.The family operates on 3.3V and can handle frequencies up to 150 MHz. Each chip contains a phase-locked loop and uses a bank architecture on its outputs that allows groups of outputs to be programmed with higher or lower frequencies than the master clock.

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!