RET Tool Paces Processes

March 17, 2003
IC manufacturers are struggling mightily with subwavelength feature sizes as silicon processes descend further into the nanometer realm. To combat the problem, Mentor Graphics tweaked its Calibre suite of resolution enhancement technology (RET) tools...

IC manufacturers are struggling mightily with subwavelength feature sizes as silicon processes descend further into the nanometer realm. To combat the problem, Mentor Graphics tweaked its Calibre suite of resolution enhancement technology (RET) tools in an effort to stay ahead of the curve. Accurate RET modeling of the lithography is pivotal in ensuring pattern fidelity despite the distortions that occur at 100 nm and down. Mentor improved the key model calibration and creation steps addressed in the Calibre VT5 (Variable Threshold, version 5) and TCCcalc (vector, thin-film optical calculations) tools. The enhancements are expected to carry Calibre down to the 45-nm process node. For information, visit www.mentor.com.

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

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