Alliance Melds Embedded Memory With Timing And Power Analysis

June 10, 2002
Embedded memory is consuming a larger portion of IC designs lately, resulting in a quandary. Designers must accurately model the performance and power requirements of the memories they design onto their chips, yet they're struggling to keep up with...

Embedded memory is consuming a larger portion of IC designs lately, resulting in a quandary. Designers must accurately model the performance and power requirements of the memories they design onto their chips, yet they're struggling to keep up with the number of process choices available from foundries.

Nassda Corp. of Santa Clara, Calif., and Virage Logic of Fremont, Calif., have joined forces to integrate Nassda's HSIM timing, power, and signal-integrity analysis tool with Virage Logic's Embed-It! embedded memory design platform. This combination enables embedded memory designs with performance characteristics that meet the needs of system-on-a-chip designers while increasing their confidence in achieving first-pass silicon success.

The tools work together to produce embedded memory intellectual property that more closely reflects actual silicon implementation. HSIM's simulation and analysis capabilities help designers achieve their requirements for power and timing performance.

"Design engineers need a way to quickly and accurately characterize their memory designs to ensure that performance matches specification when a different process is used," said Raymond Leung, vice president of engineering at Virage. The combination of HSIM and Embed-It! automatically and accurately measures memory performance and characterizes design data. HSIM provides rapid timing characterization for process variations.

For details, visit www.nassda.com and www.viragelogic.com.

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