Superior sensitivity in CDMA, GSM and third-generation wireless base station receivers is said to be offered by the CLC5956, a 12-bit, IF-sampling A/D converter. The device offers a spurious-free dynamic range of 73 dBc and signal-to-noise ratio of 67 dB at 5 MHz and 55-dBc SFDR and 60-dB SNR at 250 MHz. Input bandwidth is greater than 300 MHz, which simplifies receiver design by directly converting signals at IF frequencies and eliminating costly amplifiers, analog filters and mixers. The chip consumes just 615 mW while running at full speed, which lends it to the design of low-power receivers while minimizing the need for additional regulation and cooling. It's housed in a 48-pin TSSOP for use in tight spots and runs from a single +5V supply.
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