Nowhere To Go But Up In SoC HW/SW Codesign

So far, 2004 has seen a parade of new tools emerge to facilitate a true electronic-system-level (ESL) design flow. Meanwhile, some of the existing tools that facilitate ESL design are now undergoing major upgrades. CoWare's ConvergenSC falls into the latter category.

Last year's release of ConvergenSC by CoWare, an early proponent of SystemC, gave designers a viable platform to pursue design using SystemC. The release of ConvergenSC 2004.1 adds significant new capabilities that let designers use the tools in either of two ways, or both.

ConvergenSC 2004.1 lends itself to a platform-based flow using a large amount of reusable IP. It also suits a top-down approach with rapid exploration of hardware/software (HW/SW) partitioning options. But what CoWare anticipates (and why the company upgraded the tool) is that in practice, most users will find the most utility in a mix of both approaches (see the figure).

The platform-based flow is aided by a new graphical design environment, which enables users to easily drag and drop SystemC library components into their designs. Users may also import blocks of HDL wrapped with SystemC. The next step is to assemble and configure the parameters associated with the system bus, memory map, or any other variables. Lastly, the final SystemC design may be exported for exploration with ConvergenSC's analysis and simulation environment.

From the top-down perspective, ConvergenSC lets designers map a SystemC executable specification to reusable IP, as well as new blocks. A new Interface Synthesis capability automatically adds software drivers and/or hardware interface blocks needed to complete the partitioning between hardware and software.

The graphical user interface shows those functions mapped to hardware and those mapped to software. Unmapped functions can be assigned to the processor if they're to be implemented in software or hardware. Meanwhile, the Interface Synthesis capability automatically generates the RTL implementation for the SoC's interconnect structure from the transaction-level representation. This is useful creating design derivatives.

Also added to ConvergenSC are enhancements to CoWare's foundation SystemC technology. The tool's SystemC-aware debugger now supports multithreaded designs. This SystemC simulation runs up to 75% faster than the previous release.

ConvergenSC 2004.1 is available now. A base configuration with simulation and analysis starts at $35,000 for a one-year subscription license.