PSL Gains Support

April 14, 2003

> TRANSEDA'S VN-PROPERTY property checker and analyzer now supports Accellera's Property Specification Language (PSL, formerly known as IBM Sugar). For details, visit www.transeda.com. > ON THE HEELS of its acquisition of...

David Maliniak

>> Transeda's VN-Property property checker and analyzer now supports Accellera's Property Specification Language (PSL, formerly known as IBM Sugar). For details, visit www.transeda.com.

> On the heels of its acquisition of LISATek, CoWare has rolled out new versions of its LISATek EDGE Processor Designer, RIM Software Designer, and HUB System Integrator tools. The tools, which automate creation and modeling of embedded processors for systems-on-a-chip, now support Co-Ware's N2C design environment. Visit www.coware.com.

>> Enhancements to Synplicity's Certify verification synthesis software bring more insight into the ASIC prototyping process, including gated-clock reporting and source-code level partitioning. Also included are a new timing engine and timing analysis capabilities. Surf to www.synplicity.com.

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.