Engine Determines ICs' Economic Feasibility

June 23, 2005

Estimating the economic viability of an IC design early in the design cycle is a challenge. As an aid, Giga Scale IC's comprehensive IC economic-analysis engine lets designers transform a high-level design specification into a complete IC budgetary

David Maliniak

The economic analysis engine is now available as an upgrade to the company's InCyte chip-estimation tool. Designers can download a free, time-unlimited version of InCyte at ChipEstimate.com.

Building on InCyte's technical estimation results of die size, power, and leakage, the engine gives designers an understanding of both the technical and economic viability of a proposed chip design. Its comprehensive analysis accounts for yielded silicon-die cost, IC package recommendation and cost, test and assembly cost, nonrecurring engineering (NRE) costs, return-on-investment analysis on IP and NRE costs, and other factors.

Also, the engine performs an IC-lifecycle analysis. With it, designers can forecast and account for mask respins, increasing yields, and decreasing wafer and package costs.

The engine is available as an upgrade to ChipEstimate.com users and to enterprise-class InCyte customers. The InCyte upgrade prices start at $2000/month.

Giga Scale IC www.chipestimate.com

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.