Pair Teams On 130-nm Mixed-Signal/RF Process Design Kit

A joint effort between Mentor Graphics and Taiwan Semiconductor Manufacturing Company (TSMC) has resulted in foundry-qualified process design kits (Mentor-PDKs) that support Mentor's entire custom/mixed-signal IC design flow.

TSMC has long provided foundry-qualified design-rule check (DRC), layout-vs.-schematic (LVS), and parasitic-extraction rule decks qualified for the Mentor Graphics Calibre platform, as well as Spice models for Mentor's Eldo Spice simulator. Starting with this latest release of the 130-nm mixed-mode and RF Mentor-PDK for TSMC's CM013RG process, TSMC now supports the entire Mentor Graphics ICstudio custom/mixed-signal IC design flow. This kit includes symbol library for Design Architect-IC schematic capture and parameterized layout generators for IC Station layout editor. This complete Mentor-PDK has been pre-qualified with the TSMC process.

The design kit is available for customer download directly from TSMC, through their "TSMC-Online" website