Combining ASIC and FPGA features on the same chip and produced using 0.25-µm flash technology, ProASIC 500K devices are claimed to be the world’s only true reprogrammable gate arrays. These non-volatile, yet reprogrammable gate arrays offer from 98,000 to 1.1 million system gates with 14 to 138 Kbits of embedded two-port SRAM. The memory blocks include hardwired decoders, I/O circuits, parity generation and detection circuits, FIFO flow generation logic, and timing and control circuits to minimize external logic gate count and complexity. Performance specs for the “live-at-power-up” ICs include corner-to-corner delays of 200 MHz. ProASIC’s fine-grained architecture is said to support use of ASIC design tools, as well as enabling drop-in of soft IPs. Sampling is scheduled for late in Q3 ‘99.