Data Converters Comply With New JEDEC Interface Standard

The DAC1408D650 is a dual-channel 650-Msample/s digital-to-analog converter (DAC) with four JEDEC JESD204A data lanes. The device is fully interoperable with cost-effective FPGAs from Altera, Lattice, and Xilinx. DACs and analog-to-digital converters that conform to the new JEDEC standard deliver outstanding analog-domain performance. Compared to conventional parallel digital interfaces, the JEDEC serial digital interface can use as few as six I/O interconnect signals for a similar dual-channel data converter versus the older style 16-bit parallel LVDS interfaces, which require as many as 64 I/O interconnect signals. The JEDEC JESD204A interface also provides higher interconnect signal integrity, single-bit error detection, and system performance scalability without PCB design changes. These technical advances provide significant commercial advantages for system designers including lower system cost, increased system reliability, higher functional integration, faster time-to-market, and reduced design complexity. Samples of the JESD204A data converters are available now for lead customers. Commercial samples will be available to the broader market in Q3 2009. NXP, Eindhoven, The Netherlands.