Please read the Important Notice and Warnings at the end of this document www.infineon.com/irhirel page 1 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) PD-97956D Radiation Hardened Logic Power MOSFET Surface-Mount (SupIR-SMD™) 20V, 75A, N-channel, R8 Technology Features • Single event effect (SEE) hardened (up to LET of 92 MeV·cm2/mg) • 5V CMOS and TTL compatible • Low RDS(on) • Fast switching • Low total gate charge • Simple drive requirements • Hermetically sealed • Surface mount • Light weight • ESD rating: class 2 per MIL-STD-750, Method 1020 Potential Applications • Point-of-Load (PoL) converters for FPGA, ASIC and DSP core rails • Synchronous rectification • Redundant power distribution Product Validation Adhered to JANS screening flow according to MIL-PRF-19500 for space applications Description IR HiRel R8 Logic level power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments. The threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation. This is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC’s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. Ordering Information Table 1 Ordering options Part number Package Screening Level TID Level IRHLNS87Y50 SupIR-SMD™ COTS 100krad(Si) IRHLNS87Y50SCS SupIR-SMD™ S-Level 100krad(Si) JANSR2N7663U2A SupIR-SMD™ JANS 100krad(Si) SupIR-SMD™ Product Summary • BVDSS: 20V • ID : 75A* • RDS(on), max : 2.5m • QG, max : 130Nc • REF: MIL-PRF-19500/793 • 2 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Table of contents Table of contents Features ........................................................................................................................................ 1 Potential Applications ..................................................................................................................... 1 Product Validation .......................................................................................................................... 1 Description .................................................................................................................................... 1 Ordering Information ...................................................................................................................... 1 Table of contents ............................................................................................................................ 2 1 Absolute Maximum Ratings ..................................................................................................... 3 2 Device Characteristics ............................................................................................................ 4 2.1 Electrical Characteristics (Pre-Irradiation) ............................................................................................. 4 2.2 Source-Drain Diode Ratings and Characteristics (Pre-Irradiation) ....................................................... 5 2.3 Thermal Characteristics .......................................................................................................................... 5 2.4 Radiation Characteristics ........................................................................................................................ 5 2.4.1 Electrical Characteristics - Post Total Dose Irradiation .................................................................... 5 2.4.2 Single Event Effects – Safe Operating Area ....................................................................................... 6 3 Electrical Characteristics Curves (Pre-irradiation) ..................................................................... 7 4 Test Circuits (Pre-irradiation) ................................................................................................. 11 5 Package Outline .................................................................................................................... 12 Revision history............................................................................................................................. 13 3 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Absolute Maximum Ratings 1 Absolute Maximum Ratings Table 2 Absolute Maximum Ratings (Pre-Irradiation) 1 Repetitive Rating; Pulse width limited by maximum junction temperature. 2 VDD = 20V, starting TJ = 25°C, L = 0.19mH, Peak IL = 75A, VGS = 10V 3 ISD 75A, di/dt 450A/μs, VDD 20V, TJ 150°C Symbol Parameter Value Unit ID1 @ VGS = 4.5V, TC = 25°C Continuous Drain Current 75* A ID2 @ VGS = 4.5V, TC = 100°C Continuous Drain Current 75* A IDM @ TC = 25°C Pulsed Drain Current 1 300 A PD @ TC = 25°C Maximum Power Dissipation 125 W Linear Derating Factor 1.0 W/°C VGS Gate-to-Source Voltage ± 12 V EAS Single Pulse Avalanche Energy 2 535 mJ IAR Avalanche Current 1 75 A EAR Repetitive Avalanche Energy 1 12.5 mJ dv/dt Peak Diode Reverse Recovery 3 0.8 V/ns TJ TSTG Operating Junction and Storage Temperature Range -55 to +150 °C Lead Temperature 300 (for 5s) Weight 3.3 (Typical) g * Current is limited by package 4 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Device Characteristics 2 Device Characteristics 2.1 Electrical Characteristics (Pre-Irradiation) Table 3 Static and Dynamic Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified) Symbol Parameter Min. Typ. Max. Unit Test Conditions BVDSS Drain-to-Source Breakdown Voltage 20 — — V VGS = 0V, ID = 250A BVDSS/TJ Breakdown Voltage Temp. Coefficient — 0.02 — V/°C Reference to 25°C, ID = 250A RDS(on) Static Drain-to-Source On-State Resistance — — 2.5 m VGS = 4.5V, ID2 = 75A 1 — — 2.3 VGS = 7.0V, ID2 = 75A1 VGS(th) Gate Threshold Voltage 1.0 — 2.3 V VDS ≥ VGS, ID = 1.8mA VGS(th)/TJ Gate Threshold Voltage Coefficient — -4.3 — mV/°C Gfs Forward Transconductance 75 — — S VDS = 15V, ID2 = 75A 1 IDSS Zero Gate Voltage Drain Current — — 1.0 A VDS = 16V, VGS = 0V — — 50 VDS = 16V, VGS = 0V, TJ = 125°C IGSS Gate-to-Source Leakage Forward — — 100 nA VGS = 12V Gate-to-Source Leakage Reverse — — -100 VGS = -12V QG Total Gate Charge — 109 145 nC ID1 = 75A VDS = 10V VGS = 4.5V QGS Gate-to-Source Charge — 44 52 QGD Gate-to-Drain (‘Miller’) Charge — 24 45 td(on) Turn-On Delay Time — — 90 ns ID1 = 75A ** VDD = 10V RG = 2.35 VGS = 4.5V tr Rise Time — — 130 td(off) Turn-Off Delay Time — — 110 tf Fall Time — — 55 Ls +LD Total Inductance — 12 — nH Measured from center of Drain pad to center of Source pad Ciss Input Capacitance — 15330 — pF VGS = 0V VDS = 20V ƒ = 1.0MHz Coss Output Capacitance — 3140 — Crss Reverse Transfer Capacitance — 610 — RG Gate Resistance — 0.4 — ƒ = 1.0MHz, open drain ** Switching speed maximum limits are based on manufacturing test equipment and capability. 1 Pulse width 400 μs; Duty Cycle 2% 5 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Device Characteristics 2.2 Source-Drain Diode Ratings and Characteristics (Pre-Irradiation) Table 4 Source-Drain Diode Characteristics Symbol Parameter Min. Typ. Max. Unit Test Conditions IS Continuous Source Current (Body Diode) — — 75 A ISM Pulsed Source Current (Body Diode) 1 — — 300 A VSD Diode Forward Voltage — — 1.0 V TJ = 25°C, IS = 75A, VGS = 0V 2 trr Reverse Recovery Time — — 100 ns TJ = 25°C, IF = 75A, VDD ≤ 20V di/dt = 100A/μsQrr Reverse Recovery Charge — 143 — nC ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2.3 Thermal Characteristics Table 5 Thermal Resistance Symbol Parameter Min. Typ. Max. Unit RJC Junction-to-Case — — 1.0 °C/W 2.4 Radiation Characteristics IR HiRel radiation hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR HiRel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 3 and 4) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. 2.4.1 Electrical Characteristics - Post Total Dose Irradiation Table 6 Electrical Characteristics @ TJ = 25°C, Post Total Dose Irradiation 3, 4 Symbol Parameter Up to 100krads (Si)5 Unit Test Conditions Min. Max. BVDSS Drain-to-Source Breakdown Voltage 20 — V VGS = 0V, ID = 1mA VGS(th) Gate Threshold Voltage 1.0 2.3 V VDS ≥ VGS, ID = 1.8mA IGSS Gate-to-Source Leakage Forward — 100 nA VGS = 12V Gate-to-Source Leakage Reverse — -100 VGS = -12V IDSS Zero Gate Voltage Drain Current — 1.0 μA VDS = 16V, VGS = 0V RDS(on) Static Drain-to-Source On-State Resistance (TO-3) 2 — 3.0 m VGS = 4.5V, ID2 = 75A RDS(on) Static Drain-to-Source On-State Resistance (SupIR-SMD)2 — 2.5 m VGS = 4.5V, ID2 = 75A VSD Diode Forward Voltage — 1.0 V VGS = 0V, IF = 75A 1 Repetitive Rating; Pulse width limited by maximum junction temperature. 2 Pulse width 400 μs; Duty Cycle 2% 3 Total Dose Irradiation with VGS Bias. VGS = 12V applied and VDS = 0 during irradiation per MIL-STD-750, Method 1019, condition A. 4 Total Dose Irradiation with VDS Bias. VDS = 16V applied and VGS = 0 during irradiation per MlL-STD-750, Method 1019, condition A. 6 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Device Characteristics 2.4.2 Single Event Effects – Safe Operating Area IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. 1 and Table 7. Table 7 Typical Single Event Effects Safe Operating Area LET (MeV·cm2/mg) Energy (MeV) Range (μm) VDS (V) VGS = 0V VGS = -1V VGS = -2V VGS = -3V VGS = -4V VGS = -5V 93.2 ± 5% 1105 ± 5% 65.1 ± 5% 15 15 15 12 12 8 67.9 ± 5% 675 ± 5% 52.5 ± 5% 15 15 15 15 15 12 40 ± 5% 312 ± 5% 40.1 ± 5% 16 16 16 16 16 15 Figure 1 Typical Single Event Effect, Safe Operating Area 7 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Electrical Characteristics Curves (Pre-irradiation) 3 Electrical Characteristics Curves (Pre-irradiation) Figure 2 Typical Output Characteristics Figure 3 Typical Output Characteristics Figure 4 Typical Transfer Characteristics Figure 5 Normalized On-Resistance Vs. Temperature 8 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Electrical Characteristics Curves (Pre-irradiation) Figure 6 Typical On-Resistance Vs. Gate Voltage Figure 7 Typical On-Resistance Vs. Drain Current Figure 8 Typical Drain-to-Source Breakdown Voltage Vs. Temperature Figure 9 Typical Threshold Voltage Vs. Temperature 9 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Electrical Characteristics Curves (Pre-irradiation) Figure 10 Typical Capacitance Vs. Drain-to-Source Voltage Figure 11 Typical Gate Charge Vs. Gate-to-Source Voltage Figure 12 Typical Source-Drain Vs. Diode Forward Voltage Figure 13 Maximum Drain Current Vs. Case Temperature0 2 4 6 8 10 12 0 40 80 120 160 200 240 VGS, Gate-to-Source Voltage (V) QG, Total Gate Charge (nC) ID = 75A VDS = 16V VDS = 10V FOR TEST CIRCUIT SEE FIGURE 17 10 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Electrical Characteristics Curves (Pre-irradiation) Figure 14 Maximum Safe Operating Area Figure 15 Maximum Avalanche Energy Vs. Drain Current Figure 16 Maximum Effective Transient Thermal Impedance, Junction-to-Case 11 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Test Circuits (Pre-irradiation) 4 Test Circuits (Pre-irradiation) Figure 17 Gate Charge Test Circuit Figure 18 Gate Charge Waveform Figure 19 Unclamped Inductive Test Circuit Figure 20 Unclamped Inductive Waveform Figure 21 Switching Time Test Circuit Figure 22 Switching Time Waveforms 12 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Package Outline 5 Package Outline Note: For the most updated package outline, please see the website: SupIR-SMD 13 of 14 2025-10-06 IRHLNS87Y50 (JANSR2N7663U2A) Radiation Hardened Logic Power MOSFET (SupIR-SMD™) Revision history Revision history Document version Date of release Description of changes 03/22/2021 Final datasheet with PD number (PD-97956) Rev A 01/31/2022 Updated based on ECN-1120_08881 Rev B 11/04/2022 Updated based on ECN-1120_09312 Rev C 07/03/2024 Updated based on ECN-1120_09993 Rev D 10/06/2025 Updated based on ECN-Z8F80831493 Edition 2025-10-06 Published by International Rectifier HiRel Products, Inc. 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