Please read the Important Notice and Warnings at the end of this document www.infineon.com/irhirel page 1 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) PD-95813N Radiation Hardened Logic Level Power MOSFET Surface Mount (UB) 60V, 0.8A, N-channel, R7 Technology Features • 5V CMOS and TTL compatible • Single event effect (SEE) hardened • Fast switching • Low total gate charge • Simple drive requirements • Hermetically sealed • Light weight • Surface mount • ESD rating: Class 0B per MIL-STD-750, Method 1020 Potential Applications • DC-DC converter • Motor drives Product Validation Qualified according to MIL-PRF-19500 for space applications Description IR HiRel R7 Logic Level Power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments. The threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation. This is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC’s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. Product Summary • BVDSS: 60V • ID : 0.8A • RDS(on), max : 0.68 • QG, max: 3.6nC • REF: MIL-PRF-19500/744 UB UBCN (Isolated Ceramic Lid) UBN (Isolated Metal Lid) UBC (Shielded Ceramic Lid) 2 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Ordering Information Ordering Information Table 1 Ordering options Part number Package Screening Level TID Level IRHLUB770Z4 UB COTS 100 krad(Si) JANSR2N7616UB UB JANS 100 krad(Si) IRHLUB730Z4 UB COTS 300 krad(Si) JANSF2N7616UB UB JANS 300 krad(Si) IRHLUBN770Z4 UBN COTS 100 krad(Si) JANSR2N7616UBN UBN JANS 100 krad(Si) IRHLUBN730Z4 UBN COTS 300 krad(Si) JANSF2N7616UBN UBN JANS 300 krad(Si) IRHLUBC770Z4 UBC COTS 100 krad(Si) JANSR2N7616UBC UBC JANS 100 krad(Si) IRHLUBC730Z4 UBC COTS 300 krad(Si) JANSF2N7616UBC UBC JANS 300 krad(Si) IRHLUBCN770Z4 UBCN COTS 100 krad(Si) JANSR2N7616UBCN UBCN JANS 100 krad(Si) IRHLUBCN730Z4 UBCN COTS 300 krad(Si) JANSF2N7616UBCN UBCN JANS 300 krad(Si) 3 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Table of contents Table of contents Features ........................................................................................................................................ 1 Potential Applications ..................................................................................................................... 1 Product Validation .......................................................................................................................... 1 Description .................................................................................................................................... 1 Ordering Information ...................................................................................................................... 2 Table of contents ............................................................................................................................ 3 1 Absolute Maximum Ratings ..................................................................................................... 4 2 Device Characteristics ............................................................................................................ 5 2.1 Electrical Characteristics (Pre-Irradiation) ............................................................................................. 5 2.2 Source-Drain Diode Ratings and Characteristics (Pre-Irradiation) ....................................................... 6 2.3 Thermal Characteristics .......................................................................................................................... 6 2.4 Radiation Characteristics ........................................................................................................................ 6 2.4.1 Electrical Characteristics — Post Total Dose Irradiation .................................................................. 6 2.4.2 Single Event Effects — Safe Operating Area ...................................................................................... 7 3 Electrical Characteristics Curves (Pre-irradiation) ..................................................................... 8 4 Test Circuits (Pre-irradiation) ................................................................................................. 12 5 Package Outline .................................................................................................................... 13 Revision history............................................................................................................................. 15 4 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Absolute Maximum Ratings 1 Absolute Maximum Ratings Table 2 Absolute Maximum Ratings (Pre-Irradiation) 1 Repetitive Rating; Pulse width limited by maximum junction temperature. 2 VDD = 25V, starting TJ = 25°C, L = 83mH, Peak IL = 0.8A, VGS = 10V 3 ISD 0.8A, di/dt 130A/μs, VDD 60V, TJ 150°C Symbol Parameter Value Unit ID1 @ VGS = 4.5V, TC = 25°C Continuous Drain Current 0.8 A ID2 @ VGS = 4.5V, TC = 100°C Continuous Drain Current 0.5 A IDM @ TC = 25°C Pulsed Drain Current 1 3.2 A PD @ TC = 25°C Maximum Power Dissipation 0.6 W Linear Derating Factor 0.005 W/°C VGS Gate-to-Source Voltage ± 10 V EAS Single Pulse Avalanche Energy 2 26.6 mJ IAR Avalanche Current 1 0.8 A EAR Repetitive Avalanche Energy 1 0.06 mJ dv/dt Peak Diode Reverse Recovery 3 4.0 V/ns TJ TSTG Operating Junction and Storage Temperature Range -55 to +150 °C Lead Temperature 300 (for 5s) Weight 43 (Typical) mg 5 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Device Characteristics 2 Device Characteristics 2.1 Electrical Characteristics (Pre-Irradiation) Table 3 Static and Dynamic Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified) Symbol Parameter Min. Typ. Max. Unit Test Conditions BVDSS Drain-to-Source Breakdown Voltage 60 — — V VGS = 0V, ID = 250A BVDSS/TJ Breakdown Voltage Temp. Coefficient — 0.07 — V/°C Reference to 25°C, ID = 1.0mA RDS(on) Static Drain-to-Source On-State Resistance — — 0.68 VGS = 4.5V, ID2 = 0.5A 1 VGS(th) Gate Threshold Voltage 1.0 — 2.0 V VDS = VGS, ID = 250A VGS(th)/TJ Gate Threshold Voltage Coefficient — -4.04 — mV/°C Gfs Forward Transconductance 0.23 — — S VDS = 10V, ID2 = 0.5A 1 IDSS Zero Gate Voltage Drain Current — — 1.0 A VDS = 48V, VGS = 0V — — 10 VDS = 48V, VGS = 0V, TJ = 125°C IGSS Gate-to-Source Leakage Forward — — 100 nA VGS = 10V Gate-to-Source Leakage Reverse — — -100 VGS = -10V QG Total Gate Charge — — 3.6 nC ID1 = 0.8A VDS = 30 V VGS = 4.5V QGS Gate-to-Source Charge — — 1.5 QGD Gate-to-Drain (‘Miller’) Charge — — 1.8 td(on) Turn-On Delay Time — — 8.0 ns ID1 = 0.8A ** VDD = 30V RG = 24 VGS = 5.0V tr Rise Time — — 24 td(off) Turn-Off Delay Time — — 30 tf Fall Time — — 12 Ls +LD Total Inductance — 8.4 — nH Measured from center of Drain pad to center of Source pad Ciss Input Capacitance — 166 — pF VGS = 0V VDS = 25V ƒ = 1.0MHz Coss Output Capacitance — 42 — Crss Reverse Transfer Capacitance — 3.5 — RG Gate Resistance — 9.5 — Ω ƒ = 1.0MHz, open drain ** Switching speed maximum limits are based on manufacturing test equipment and capability. 1 Pulse width 300 μs; Duty Cycle 2% 6 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Device Characteristics 2.2 Source-Drain Diode Ratings and Characteristics (Pre-Irradiation) Table 4 Source-Drain Diode Characteristics Symbol Parameter Min. Typ. Max. Unit Test Conditions IS Continuous Source Current (Body Diode) — — 0.8 A ISM Pulsed Source Current (Body Diode) 1 — — 3.2 A VSD Diode Forward Voltage — — 1.2 V TJ = 25°C, IS = 0.8 A, VGS = 0V 2 trr Reverse Recovery Time — — 78 ns TJ = 25°C, IF = 0.8A, VDD ≤ 25V di/dt = 100A/μs 2 Qrr Reverse Recovery Charge — 44 — nC ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2.3 Thermal Characteristics Table 5 Thermal Resistance Symbol Parameter Min. Typ. Max. Unit RJA Junction-to-Ambient — — 200 °C/W RJL Junction-to-Lead — — 40 2.4 Radiation Characteristics IR HiRel radiation hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR HiRel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 3 and 4) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. 2.4.1 Electrical Characteristics — Post Total Dose Irradiation Table 6 Electrical Characteristics @ TJ = 25°C, Post Total Dose Irradiation 3, 4 Symbol Parameter Up to 300 krad (Si) 5 Unit Test Conditions Min. Max. BVDSS Drain-to-Source Breakdown Voltage 60 — V VGS = 0V, ID = 250A VGS(th) Gate Threshold Voltage 1.0 2.0 V VDS = VGS, ID = 250A IGSS Gate-to-Source Leakage Forward — 100 nA VGS = 10V Gate-to-Source Leakage Reverse — -100 VGS = -10V IDSS Zero Gate Voltage Drain Current — 1.0 μA VDS = 48V, VGS = 0V RDS(on) Static Drain-to-Source On-State Resistance (TO-39) 2 — 0.65 VGS = 4.5V, ID2 = 0.5A RDS(on) Static Drain-to-Source On-State Resistance (UB) 2 — 0.68 VGS = 4.5V, ID2 = 0.5A VSD Diode Forward Voltage — 1.2 V VGS = 0V, IF = 0.8A 1 Repetitive Rating; Pulse width limited by maximum junction temperature. 2 Pulse width 300 μs; Duty Cycle 2% 3 Total Dose Irradiation with VGS Bias. VGS = 10V applied and VDS = 0 during irradiation per MIL-STD-750, Method 1019, condition A. 4 Total Dose Irradiation with VDS Bias. VDS = 48V applied and VGS = 0 during irradiation per MlL-STD-750, Method 1019, condition A. 5 Part numbers: IRHLUB770Z4 (JANSR2N7616UB), IRHLUB730Z4 (JANSF2N7616UB), IRHLUBN770Z4 (JANSR2N7616UBN), IRHLUBN730Z4 (JANSF2N7616UBN), IRHLUBC770Z4 (JANSR2N7616UBC), IRHLUBC730Z4 (JANSF2N7616UBC), IRHLUBCN770Z4 (JANSR2N7616UBCN), IRHLUBCN730Z4 (JANSF2N7616UBCN) 7 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Device Characteristics 2.4.2 Single Event Effects — Safe Operating Area IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. 1 and Table 7. Table 7 Typical Single Event Effects Safe Operating Area LET (MeV·cm2/mg) Energy (MeV) Range (μm) VDS (V) VGS = 0V VGS = -2V VGS = -4V VGS = -5V VGS = -6V 38 ± 5% 300 ± 7.5% 38 ± 7.5% 60 60 60 60 60 62 ± 5% 355 ± 7. 5% 33 ± 7.5% 60 60 60 60 — 85 ± 5% 380 ± 7.5% 29 ± 7.5% 60 60 60 — — Figure 1 Typical Single Event Effect, Safe Operating Area 8 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Electrical Characteristics Curves (Pre-irradiation) 3 Electrical Characteristics Curves (Pre-irradiation) Figure 2 Typical Output Characteristics Figure 3 Typical Output Characteristics Figure 4 Typical Transfer Characteristics Figure 5 Normalized On-Resistance Vs. Temperature 9 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Electrical Characteristics Curves (Pre-irradiation) Figure 6 Typical On-Resistance Vs. Gate Voltage Figure 7 Typical On-Resistance Vs. Drain Current Figure 8 Typical Drain-to-Source Breakdown Voltage Vs. Temperature Figure 9 Typical Threshold Voltage Vs. Temperature 10 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Electrical Characteristics Curves (Pre-irradiation) Figure 10 Typical Capacitance Vs. Drain-to-Source Voltage Figure 11 Gate-to-Source Voltage Vs. Typical Gate Charge Figure 12 Typical Source-Drain Current Vs. Diode Forward Voltage Figure 13 Maximum Drain Current Vs. Case Temperature 11 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Electrical Characteristics Curves (Pre-irradiation) Figure 14 Maximum Safe Operating Area Figure 15 Maximum Avalanche Energy Vs. Junction Temperature Figure 16 Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 12 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Test Circuits (Pre-irradiation) 4 Test Circuits (Pre-irradiation) Figure 17 Gate Charge Test Circuit Figure 18 Gate Charge Waveform Figure 19 Unclamped Inductive Test Circuit Figure 20 Unclamped Inductive Waveform Figure 21 Switching Time Test Circuit Figure 22 Switching Time Waveforms 13 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Package Outline 5 Package Outline Note: For the most updated package outline, please see the website: UB Case Outline and Dimensions - UB (Shielded Metal Lid Connected to 4th Pad) Note: For the most updated package outline, please see the website: UBN Case Outline and Dimensions - UBN (Isolated Metal Lid, No 4th Pad) 14 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Package Outline Note: For the most updated package outline, please see the website: UBC Case Outline and Dimensions - UBC (Shielded Ceramic Lid Connected to 4th Pad) Note: For the most updated package outline, please see the website: UBCN Case Outline and Dimensions - UBCN (Isolated Ceramic Lid, No 4th Pad) 15 of 16 2025-09-08 IRHLUB770Z4 (JANSR2N7616UB) Radiation Hardened Logic Level Power MOSFET Surface-Mount (UB) Revision history Revision history Document version Date of release Description of changes 02/03/2004 Datasheet (PD-95813) Rev A 09/03/2004 Updated based on ECN-12213 Rev B 09/09/2005 Updated based on ECN-13390 Rev C 01/31/2006 Deleted typo- “Available on tape and reel” from Feature – Page 1. Rev D 06/11/2007 Added 2N7616UB designated number Rev E 07/21/2009 Updated based on ECN-16472 Rev F 08/04/2009 Updated SEE table Rev G 03/15/2010 Updated based on ECN-17155 Rev H 11/02/2012 Updated Fig10 Rev I 02/05/2019 Updated based on ECN-1120_05810 Rev J 01/10/2020 Updated based on ECN-1120_07601 Rev K 10/21/2020 Updated based on ECN-1120_08235 Rev L 04/27/2021 Updated based on ECN-1120_08548 Rev M 08/12/2022 Updated based on ECN-1120_09174 Rev N 09/08/2025 Updated based on ECN- Z8F80828229 Edition 2025-09-08 Published by International Rectifier HiRel Products, Inc. An Infineon Technologies company El Segundo, California 90245 USA © 2025 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: [email protected] Document reference IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). 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