Electronic Design

Battery Backup Uses Delay To Avoid Glitches

The simplest link from a main supply and backup battery to a load is the diode-OR connection. But a diode-OR doesn't work when the backup battery's voltage exceeds the main supply voltage. The circuit in Figure 1 handles that condition. Its main switch-mode supply voltage ranges from 7 to 30 V, and the backup supply is a 9-V battery.

IC1 is an ultra-low-power device that includes a comparator and a 1.182-V bandgap reference. During normal operation, the comparator output is low, the three parallel-connected n-channel FETs are off, and the battery's negative terminal floats. Power flows from the main supply to the load. When the main voltage declines to 7.4 V, the comparator output goes high, turning on the FETs and grounding the negative terminal of the battery. Power then flows from battery to load.

As the main supply voltage rises and passes 8.4 V, the FETs turn off, allowing the output to resume tracking the main supply voltage.

D1, C1, and R6 introduce a delay in the gate drive, which eliminates a supply-rail glitch that would otherwise occur when switching from the battery to the main supply. Such glitches can cause an unacceptable reset in the system's microcontroller. Figure 2 illustrates the absence of that effect in the Figure 1 circuit. Note that R3 and R4 set the hysteresis in IC1 to 800 mV, as required for proper operation. See the MAX931 data sheet for calculation of those resistor values.

See Figure 1
See Figure 2

Hide comments


  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.