Electronic Design

Bootstrapped SEPIC Supply Extends Battery Charge For GSM Power Amplifier

With battery-powered portable equipment, the right voltage-regulator topology can significantly increase battery operating time on a single charge. Compared to two common topologies—the linear regulator and the step-down regulator—the single-ended primary inductance converter (SEPIC) increases battery operating time on a single charge by up to 50%. (See "Voltage-Regulator Topology In A Nutshell," p. 90.)

Battery voltage is not constant. It can range both above and below the desired output voltage of the regulator. Since the SEPIC configuration provides a regulated output over the entire range of useful battery voltage, it dramatically improves battery operating time.

The following example describes how to design a 3.8-V SEPIC supply for a Global System for Mobile Communications (GSM) power amplifier. Designers can use these guidelines to reduce component size, improve efficiency, and optimize layout. Although this application example is specific to GSM power amplifiers, the concepts also apply to other SEPIC designs.

The GSM power-supply specification requires the same functionality whether the power source is a single lithium-ion (Li-ion) battery or a three-cell nickel-metal-hydride (NiMH) battery (with the cells connected in series). The voltage from a Li-ion battery ranges from 2.7 to 4.2 V, while that of three NiMH batteries ranges from 2.6 to 4.2 V. Therefore, the 3.8-V GSM supply must handle input voltages ranging from 2.6 to 4.2 V.

The average current required from the 3.8-V output is 380 mA, and the power supply must be able to sustain 2.6-A current pulses on an intermittent basis. During shutdown, the output must be dc-isolated from the input so the load doesn't drain the battery. Due to the limited space within a GSM phone, the maximum component height is 4 mm.

This SEPIC power supply surpasses these design objectives (Fig. 1). The input voltage can vary from 2.5 to 5.5 V, and the output current can be as high as 500 mA.

The chief challenge when choosing components that operate over the full range of desired input voltage lies at the low end of the range. The circuit's switching regulator (U2) must start up when the battery is nearly fully discharged. Choosing the right regulator and power MOSFET makes it possible.

Bootstrapping U2—the MAX-669 switching-regulator chip—by connecting its output to its input increases the voltage applied to the gate of power MOSFET Q1, reducing its on-resistance. This reduction aids the startup process and increases efficiency. With bootstrapping, the power supply can start up with lower voltages and heavier loads.

To understand why bootstrapping works, first imagine regulator U2 in a standard step-up configuration. If capacitor C4 were shorted and inductor L2 and diode-pair U1 were removed, the circuit would represent a step-up switching regulator. Next, imagine connecting D1's cathode to U2's VCC pin. By doing so, you've bootstrapped the output to the input.

In this bootstrapped configuration, the battery voltage (minus the voltage drop across D1) powers the chip when it's first starting up. The battery voltage starts to increase as U2 begins boosting. The boosted voltage feeds U2's input, which in turn feeds the gate of MOSFET Q1. The increased voltage enhances the MOSFET, further lowering its on-resistance.

Unfortunately, a SEPIC configuration includes a capacitor (C4) that blocks the path over which the battery finds its way to U2's input (through inductor L1 and catch diode D1). Dual-diode U1 provides an alternate route. Like a standard bootstrapping circuit, U1 allows the battery to power U2 at startup. When U2's output voltage exceeds the battery voltage, the chip, in effect, powers itself, thereby further enhancing the power MOSFET.

Given the 1.5-V typical gate threshold of the Si2302 MOSFET, even the 2.2-V startup voltage (the minimum input voltage minus the 0.3-V diode drop) enhances the n-channel Q1. When the output of the power supply reaches 3.8 V, Q1's gate sees 3.5 V. At 3.5 V, the MOSFET's on-resistance is reduced further, typically to 112 mΩ at 125°C.

Trimming On-Resistance
Reducing Q1's on-resistance by bootstrapping U2's input not only aids the startup process, it also reduces MOSFET power dissipation. It's possible to further reduce Q1 losses by choosing a MOSFET with low reverse capacitance (CRSS). This capacitance is one of several factors that contributes to transition loss, which is caused by the finite time it takes to turn the MOSFET on and off.

Another transition-loss factor, the voltage excursion on Q1's drain, is low in this application:

VDS = VIN + VOUT + VD = 10 V max

Choosing a regulator chip that drives Q1's gate with fast edges also reduces transition losses. The MAX669's 2-Ω driver provides the high-speed edges needed to minimize this loss factor. You can calculate Q1's power dissipation (transition loss) with acceptable accuracy (within 20%) with the following equation:

P = 2.5 × VDS1.85 × IPKCRSSfR

where VDS is typically 8 V, CRSS is 200 pF for the Si2302 operated at low drain voltages, and fR (U2's switching frequency) is 500 kHz. When U2 supplies a 100-mA output current, the peak current (IPK) through Q1 is 406 mA, producing a transition loss of 4.75 mW. This loss increases to 19 mW at a 500-mA output load when the peak current through Q1 is 1.59 A. Due to the speed of U2's MOSFET driver, the slope of the transitions (the rate of change of current versus time) isn't needed in this calculation.

Choosing a MOSFET with a small gate charge reduces its gate-charge loss, another source of power dissipation. Switching the Si2302's small 5-nC gate charge at 500 kHz causes the MOSFET to draw an additional 2.5 mA from the battery. Assuming a 4-V battery voltage, this current draw translates to a power consumption of 10 mW. The gate-charge loss is nearly constant, since it's relatively independent of U2's output current.

The series resistance of the power supply's two inductors also causes losses. For the inductors used here, the series resistance is typically 71 mΩ. With a series resistance this low, the dc resistive losses are insignificant. Losses at the 500-kHz switching frequency are another matter, though, as the skin effect can multiply the dc resistance by a factor of 10. Fortunately, the ac component of the current through the inductor is small in proportion to the dc component. The equivalent series resistance at 500 kHz is 140 mΩ.

Minimizing the change in flux density (B) of the ferrite core helps reduce core losses. With a relatively high-value inductor, the change in B as a function of current is small. This change can be approximated by estimating B at zero inductor current and at the 1.3-A maximum—about 350 mT. ("T" represents the Tesla, the unit of measure for flux density.) The ac component of the inductor current varies ±75 mA, corresponding to a ±20-mT change in B. Most ferrite-core losses are lower than 50 mW/cm3 at this flux level and frequency (500 kHz). For a ferrite volume of only 0.1 cm3, the core losses for the CDRH6D38 inductor amount to only 5 mW total, which is actually negligible at high output currents and practically negligible for light loads.

A number of different diodes can be used as D1 in this design. At minimum, D1 must be rated at 10 V and handle 0.6-A average current, 1.5-A peak current (exhibited during the energy transfer to the output). Here, the ZHCS1000, a 40-V diode housed in a SOT23 package, works well. Devices with lower breakdown voltages exhibit lower forward voltages and, therefore, lower conduction losses. However, switching losses could increase due to the higher reverse capacitance of those lower-voltage diodes. The choice depends on the current range where the power supply must be most efficient.

Losses due to diode reverse current aren't typically a factor if D1's temperature remains under 85°C. But, the diode's forward voltage drop decreases with temperature. Each specific diode has an optimal junction temperature where the loss due to the combined effects of reverse current and the forward voltage drop are minimal.

Measuring The Supply's Efficiency
Even coupling capacitor C4 affects the power supply's efficiency. The voltage across C4 equals the input voltage, so a capacitor rated for, say, 6.3 V is suitable. Yet the equivalent series resistance (ESR) of a capacitor varies with frequency (Fig. 2). For a 10-V, 4.7-µF capacitor (the LMK316BJ475M by Taiyo-Yuden), ESR is lower than 10 mΩ in the 100- to 1500-kHz range. With this low ESR of 10 mΩ, C4 losses are less than 4.7 mW with a 500-mA output current.

Finally, the ability to shut down regulator U2 can reduce power losses in standby states. The MAX669 shutdown current is only 6 µA maximum.

Despite the relatively low output voltage of this power supply, its measured efficiency is quite respectable. Figure 3 depicts efficiency as a function of both input voltage (from 2.5 to 5.5 V) and load current (from 100 to 600 mA). With the input voltage at 5.5 V, the circuit achieves its peak efficiency of 86%, conveniently right around the 380-mA output current required by the GSM power amplifier.

At high output currents, a standard efficiency equation for the SEPIC circuit accurately predicts the measured results. For smaller current levels, however, the measured efficiency is 5% lower than expected. This is because several factors combine to produce 30 mW of additional loss. MOSFET Q1 produces gate-charge losses of 10 mW, inductors L1 and L2 cause ferrite losses of 10 mW, transition losses cause an additional 5 mW, and the regulator chip accounts for up to 2 mW more.

At low load currents, these losses nearly disappear, primarily due to the MAX669's idle mode, which activates automatically under light loads. In pulse-width-modulation (PWM) mode, the chip switches regularly at 500 kHz. Conversely, in idle mode, the chip pulses only when necessary—much less often than in PWM mode. Idle mode, therefore, greatly diminishes gate-charge, transition, and ferrite losses, as well as power consumption.

When U2 is shut down, the power supply draws a mere 5 µA because of the low shutdown current of regulator U2. It also draws that much because coupling capacitor C4 prevents a dc connection between the battery and the output. In contrast, when a standard step-up (or boost) circuit is shut down, the load remains connected to the battery through the inductor and the catch diode, allowing the load to continue to draw current from the battery and drain it.

Diode D1 is the main source of the supply's losses. A diode with a lower reverse voltage typically comes with a lower forward voltage drop. Substituting the 20-V MBRM120LT3 diode for the 40-V ZHCS1000 diode reduces the forward voltage drop slightly and improves efficiency by 1.1%. Although the reverse capacitance of the former far exceeds that of the latter diode (300 pF versus 180 pF), the smaller forward voltage drop more than compensates for the efficiency loss due to this increased reverse capacitance.

To further reduce the diode losses, place a synchronous p-channel transistor across D1 to effectively short the diode and eliminate the losses caused by its forward voltage drop. This synchronous transistor must switch ON at exactly the same time as diode D1 conducts, making the circuit more complicated.

Since the currents through L1 and L2 are un-equal, making L2 smaller and L1 larger will decrease their total losses. To reduce the inductive losses still further, the two inductors can be wound around the same core.

If the input voltage were guaranteed to be greater than 2.7 V, removing U1 and C2 and connecting the battery directly to U2 would simplify the circuit. However, these components are necessary to accommodate the bottom end of a NiMH battery's voltage range.

Choosing a larger MOSFET would reduce losses at higher output currents. Doing so, though, would de-crease the efficiency at lower output currents, since the switching losses would be higher.

Regulator U2 relies on current-sense resistor R1 to set the peak current through inductor L1. R1 prevents the current from reaching a level that would cause L1 to saturate, which would allow excessively high current to flow through the inductor. Make sure R1 is a noninductive device.

If large pulses of output current discharge reservoir capacitor C7, R1 limits the output current while U2 recovers. With a high current limit, recovery is fast, but efficiency suffers. A lower current limit slows down recovery but improves efficiency.

When operating a GSM power amplifier, the average current is 380 mA, and the peak current can reach 2.63 A for 577 µs, every 4.6 ms. Reservoir capacitor C7 supplies these current peaks. The capacitance of C7 must be about 4000 µF to limit the output-voltage drop to 380 mV during these 577-µs pulses.

For less demanding applications, C7 can be much smaller. In those cases, a capacitor of at least 22 µF produces less than 50 mV of output ripple when the output current reaches 500 mA, assuming its ESR is sufficiently low.

This low-value capacitor should be connected in parallel with a capacitor that's effective at higher frequencies. The 6.8-µF ceramic capacitor C6 made with X7R material serves this purpose while lowering the overall ESR at the output of the regulator. The ESR of the two paralleled output capacitors can be calculated using the complex impedance of each capacitor (i.e., by modeling each capacitor's ESR as the real component and its capacitance as the imaginary). Once the parallel impedance is calculated, the real component of the resulting complex number can be used as the effective ESR at a given frequency.

To simplify the bill of materials, the same Sumida inductor is used for both L1 and L2. This inductor measures 6.7 by 6.7 mm with a height of 4 mm. It's possible to use different inductors to increase efficiency. In this case, the size of one inductor would increase while the other decreases. By using a switching-regulator chip that includes a precise current limit, the inductor need not be rated to handle a larger current than is needed to supply the maximum output current, minimizing the size of the inductors. But the current rating of some inductors should be somewhat larger than the maximum anticipated inductor current, because the ferrite loss of some inductors increases as the current approaches the inductor's saturation point.

Capacitor sizes can be reduced by using capacitors made from different materials, provided the capacitor meets the required specifications. In this design, C4 is made of X7R material. If a capacitor made of X5R material is used instead, the size diminishes, but the X5R capacitor is rated to only 85°C, while the X7R capacitor is rated to 125°C.

Because regulator U2 switches at 500 kHz, the pc-board layout should be treated as a high-frequency circuit. All the high-current paths should be routed first, using larger copper traces to minimize the parasitic inductance and resistance. Capacitors C2 and C1 should be as close as possible to pins 1 and 9 of the U2 chip.

Be sure to allocate enough copper to properly dissipate the power generated by Q1. However, use only enough copper underneath diode D1 to ensure its temperature never exceeds 125°C. Operating the diode at a high temperature reduces its forward voltage drop and increases efficiency. But be sure the losses due to increased reverse current don't outweigh the benefits of reducing the forward voltage drop.

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