Electronic Design
PFC Control Technique Maximizes Light Load  Efficiency

PFC Control Technique Maximizes Light Load Efficiency

A new power factor correction (PFC) control topology developed by Power Integrations combines many of the attractive features of both critical conduction mode (CRM) and continuous conduction mode (CCM) techniques in a single control scheme. Variable-frequency CCM optimizes efficiency at light load levels while simplifying electromagnetic interference (EMI) filter design. At the heart of this new control scheme is a constant amp-second on-time and constant volt-second off-time algorithm. The topology implements PFC without measuring the input current.

Need For PFC

Evolving worldwide regulatory requirements present imposing challenges for designers of a growing variety of consumer and industrial electronic systems. For example, IEC 61000-3-2 now mandates the use of power factor pre-converters at a power rating of 75 W and higher. Popular certification programs such as 80 Plus and Energy Star have also added stringent new PFC requirements. These new regulations demand high efficiency across the entire load range.

That trend has led to the widespread use of switch-mode power supplies (SMPSs). While today’s SMPSs offer excellent line and load regulation and high conversion efficiency, as nonlinear components they generate narrow, high-amplitude pulses out of phase with the line voltage.

In an ideal world, every electrical system would present a load in which the reactive power drawn by the device is zero and the current not only replicates the input voltage, but also is exactly in phase with it. That, of course, typically isn’t the case. The harmonic content of current pulses, along with the reactive input of the power supply, degrades the ac source creating EMI and energy loss.

PFC shapes the input current of the SMPS to maximize the real power available from the mains by making the power supply appear as a linear load to the system. PFC circuits achieve this by reducing peak and RMS currents and optimizing the efficiency of the power sourced from the mains.


Designers typically implement PFC using any number of topologies, most commonly a boost approach, with any of a variety of control circuits. Designers have traditionally opted for either CCM or CRM control circuits for active PFC solutions. As regulatory requirements for power efficiency continue to evolve, demand will build for more effective PFC solutions.

In traditional CCM control circuits, high efficiency at light load is a challenge because fixed MOSFET switching frequencies cause fixed switching losses on each cycle. EMI noise also presents a major problem. By dispersing the energy delivered in the switching pulses across a wide range of frequencies, a new approach designated “VF-CCM” for variable-frequency CCM both improves efficiency from 10% to 100% load and simplifies the input EMI filter design.


A CCM circuit switches the inductor at a constant frequency and features a choke current that never falls to zero. This approach minimizes transitions in the current waveform, allowing the use of a lower ac current and lower peak currents and resulting in lower conduction loss than alternative control schemes, but it has relatively high switching losses (Fig. 1).

CRM or boundary conduction mode circuits offer a second option. In this approach, the inductor is allowed to stop conducting and current falls to zero before ramping up. In addition, frequency varies during the ac cycle.

By switching on the MOSFET at zero current, these circuits avoid the reverse recovery power loss seen in CCM circuits and allow the use of inexpensive output silicon rectifiers. But CRM requires a more complex variable switching frequency scheme, and the use of higher peak currents leads to higher losses at higher power levels.

How VFCCM Works

Input current amp-second product during tON is described as K2 where:

K2 = iIN × tON => iIN = K2/tON (1)

During tON, the choke current ramps up (core-set function = K1):

K1 = VIN × tON => tON = K1/VIN (2)

By substituting the value for tON (2) into (1) we see that:

iIN = VIN × K2/K1

TOFF controls the output voltage. During the off period (MOSFET off, VD-S = VOUT), the choke current clamps down. The corresponding volt-second product across the PFC choke when the MOSFET is turned off is:

Volt.Second product = (VOUT – VIN) × tOFF (3)

The choke must reset in tOFF (must equal K1 from tON) so:

VIN × tON = K1 = (VOUT – VIN) × tOFF => VOUT = K1/tOFF + VIN (4)

To maximize efficiency over the entire load range, this new methodology uses a control technique called “frequency sliding” in which (unlike traditional CCM approaches) the switching frequency is not constant but variable (Fig. 2). Moreover, this innovative approach adjusts the switching frequency over output load, input line voltage, and input line cycle to deliver high efficiency at very light loads.

In this methodology, frequency (per cycle tON and tOFF) varies over the input line cycle as VIN changes. But the controller manages frequency variation by preventing it from dropping below 24 kHz (eliminating the audio band) and setting a peak switching frequency of approximately 110 kHz. The wide switching frequency variation as the input voltage varies provides a spread spectrum effect that significantly reduces the conducted noise emission, which simplifies the input EMI filter design.

In The Real World

As a design example, consider a 347-W PFC front-end converter (Fig. 3). By measurement, the converter operates at a power factor of 0.998 at 115 V ac and 0.984 at 230-V ac input full load. The amplitude of the input current harmonics indicates the design easily meets requirements for EN 61000-3-2 Class C and D compliance with low-harmonics input circuit components (Fig. 4).

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