Electronic Design

A Deep And Varied Technical Program

This year's technical program is touted as one of the deepest in the conference's long history. Its seven tracks span the full breadth of the EDA industry. Added for the first time this year is a track that zooms in on intersecting business and technology issues.

Pat Gelsinger, chief technology officer and senior vice president of Intel Corp., and Walden C. Rhines, chief executive officer of Mentor Graphics Corp., will deliver two keynote addresses in the new business track.

Gelsinger's Tuesday keynote will discuss how future EDA tools must cope with a shift from deterministic design to statistical and probabilistic design, ultimately bringing about a paradigm shift in integration and performance.

Rhines, in his Thursday keynote, will ruminate on whether the EDA industry has enough new problems to solve. He'll explore the design problems most likely to drive growth for EDA in coming years.

Workshops are always key elements of the DAC program. The Sunday before DAC offers an intriguing all-day workshop titled "UML for SoC Design." The Unified Modeling Language (UML) continues to gain in popularity as an SoC design language since it lends itself well to hardware/software codevelopment. In this session, a series of presentations will cover numerous facets of using UML in a system-level methodology.

Monday afternoon's Workshop for Women in Design Automation will feature a keynote talk by Duy-Loan Le, senior fellow of Texas Instruments, titled "Keeping the Passion Alive." The workshop also will be highlighted by the presentation of this year's Marie R. Pistilli Women in EDA Achievement Award to Mary Jane Irwin, holder of the Robert Noll Chair in the Department of Computer Science at Pennsylvania State University. The award goes annually to a woman who has notably helped advance the role of women in EDA.

A series of panels and presentations in the DAC Pavilion on the exhibit floor promises to be interesting. Monday morning will feature the EDA Business Forecast with Gary Smith, chief EDA analyst at Gartner Dataquest. Other Pavilion sessions will include a reprise of last year's "Ask the CTO" panel as well as a variety of other business and technology topics.

The ESL Technology Symposium on Tuesday will discuss challenges for future SoCs and embedded systems and the role of system-level design. Panelists will examine the roadmap for addressing those challenges through emerging design languages and verification concepts.

Wednesday will see another technology symposium, this time exploring issues related to RTL handoff. Dataquest's Smith will moderate a discussion of an RTL design methodology that requires detailed analysis of physical issues arising during synthesis.

TAGS: Intel
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