Toshiba, the X Initiative and Cadence Design Systems have announced the industry's first commercial SoC devices built on the X Architecture design – a new approach to large-scale integration that enables the production of smaller, faster chips.
The TC90400XBG chip validates the benefits of the X Architecture by delivering a highly integrated solution for next-generation digital video broadcast and multimedia home-entertainment applications.
The X Architecture represents a new way of orienting a chip's microscopic interconnect wires with the pervasive use of diagonal routes, in addition to traditional right-angle 'Manhattan' routing. This architecture results in chip designs with significantly fewer wires and less vias to connect the wiring layers in SoC devices.
By enabling higher quality device performance metrics, the X Architecture will bring advantages to next-generation digital media and other advanced consumer applications. Toshiba and Cadence have collaborated on the development of the X Architecture and are co-sponsors of the X Initiative, a consortium of more than 40 leading companies dedicated to facilitating the commercial adoption of the X Architecture by preparing the design chain for volume production.
Toshiba's milestone chip, TC90400XBG, designed for integration in digital-media and home-entertainment applications, is fabricated with 130nm process technology. Compared to equivalent Toshiba products with the conventional 'Manhattan' design, the new chip is approximately 11% faster and 10% smaller in random logic area.
Samples of the device will be available in November 2004 and mass production is expected to begin in the second quarter of 2005. Toshiba has already got its first customer for TC90400XBG: the chip will be integrated into digital TVs, initially in products for the European market.
Commenting on the importance of the milestone for both Toshiba and the X Initiative, Takashi Yoshimori, technology executive, SoC-Design at the Toshiba Semiconductor Company, said: 'By collaborating with Cadence and members of the X Initiative to develop the industry's first X-based SoC, Toshiba is responding to diversifying market demands for performance-enabling single-chip solutions that can result in faster and smaller chips when compared to conventional design methodologies. With the application of this state-of-the art design process, Toshiba will further leverage its leadership in the SoC market.'
'Toshiba has played an integral role in advancing the commercial viability of the X Architecture, including the development of the first 90nm functional test chip,' said Aki Fujimura, X Initiative steering group member and a chief technology officer at Cadence.