Spice Simulator Tunes RC Active-Filter Circuits

Aug. 3, 1998
It’s common practice to design active filter circuits by treating operational amplifiers as ideal devices. This simplification, however, can lead to significant deviations from the desired frequency response—primarily due to the finite gain-bandwidth...

It’s common practice to design active filter circuits by treating operational amplifiers as ideal devices. This simplification, however, can lead to significant deviations from the desired frequency response—primarily due to the finite gain-bandwidth product (GB) of real amplifiers.

Conventional techniques for reducing this influence (passive/active phase compensation, predistortion) aren’t very effective because they consider only a single-pole op-amp model. Moreover, they neglect other imperfections (e.g., input, output, and load impedances; pin parasitics). Recently, National Semiconductor Corp., Santa Clara, Calif., published a design note1 describing an alternative and somewhat cumbersome tuning method consisting of several iteration steps with alternating calculations and measurements or simulations. The method also requires knowing all parameter sensitivities that are specific to each filter topology.

This design idea presents a much simpler technique for compensating amplifier imperfections, using suitable simulation software supported by realistic amplifier macromodels. The basic idea of the proposed method is to adjust the filter’s loop gain at the pole frequency (fP) to the specified value, thereby correcting the pole location and, hence, the transfer function of the filter (“pole tuning”). For this purpose, a certain part of the feedback network has to be modified, whereby the new element values are calculated within one simulation run only.

The proposed technique uses the “Substitution Theorem,” which allows an exchange between an arbitrary branch Z of a linear network and an independent source without influencing voltage-to-current ratios—provided there’s only one solution for these ratios.2 Since this is the case, specifically, for a feedback system having a loop gain of unity (AL = 1), an artificial block TUNER is inserted into the feedback path of the filter (see the figure). The transfer parameters of the tuner block must be identical to the reciprocal loop gain (magnitude ALP, phase ΦLP in degrees) of the ideal filter circuit at the desired frequency (fZ = fP). For this purpose, the following expression can be used to advantage:

HTUNER = (1/ALP) × exp\[−ΦLPπs/(180¦s¦)\]

where s = the complex frequency variable.

In addition, to preserve proper loading of the op amp, the TUNER input must be connected to an artificial current source simulating the output load under closedloop conditions:

ILOAD = IT/HTUNER

where IT =the current through the TUNER output terminal.

Hint: Both functions can be implemented very easily as a separate subcircuit using analog behavioral modeling techniques available in many simulation packages, such as MicroSim’s PSpice.

In principle, the “pole-tuning” method can be applied to all second-order low-pass and bandpass topologies. The bandpass example presented in the figure is, for comparative purposes, identical to the Sallen-Key section A as given in the National Semiconductor design note. However, instead of NSC’s CLC446, a similar part will be used (the HFA1100 from Harris Semiconductor), in conjunction with a feedback resistor (RF = 560 Ω) as recommended by the manufacturer.

Assuming an ideal amplifier, the bandpass characteristic as specified in the table (first row) can be realized using the element set as given here (taken from NSC’s design note):

R1 = 120.3 Ω \[121\]; R4 = 747.9 Ω \[750\]; R5 = 20.4 Ω \[20.5\]; K = 1 + RF/ RG = 1.29 \[1.294\]; RF = 560 Ω \[562\]; RG = 1.93k \[1.91k\]; C2 = 98.67 pF \[100 pF\]; C3 = 10.95 pF \[11 pF\]

The values in brackets are the nearest nominal standard 1% value that cause, together with a realistic HFA1100 macromodel—a severe pole displacement (see the table, second row).

Setting the TUNER parameters requires the ideal loop gain of the filter to be determined first. A simulation with the ideal components and with an open feedback loop between terminals B and C yields at the pole frequency (fP = 42.36 MHz): ALP = 0.8937 and ΦLP = 0.0013°.

Thus, closing the loop with a properly designed TUNER block would produce an overall loop gain AL = 1 under ideal conditions. However, if the filter circuit contains real elements with parasitics and a realistic op-amp macromodel, the loop gain will not be unity—unless a suitable part of the network is modified in accordance with the Substitution Theorem. For this purpose, a closed-loop frequency analysis is performed with one element (in our case it’s R5) being replaced by a voltage source VZ (see the figure, again). Furthermore, to be realistic, standard element values are used (as given above in brackets) together with a parasitic capacitance of 0.5 pF across all resistors. Resulting from this analysis, the current-to-voltage ratio IZ/VZ at fZ = fP gives a complex conductance to be utilized in place of R5, which can be realized by two parallel parameters:

R5* = VZ/RE(IZ) = 13.47 Ω

and

C5* = IMG(IZ)/(2πfPVZ) = 28.7 pF

Note that many graphical postprocessors have computational capabilities for displaying these simulation results directly with the aid of appropriate macro expressions (e.g., PSpice/Probe).

Hint: As an alternative, running the simulation at one frequency only (fP) and stepping through a restricted C2 value range (e.g., ±50%) is recommended. In this case, C5* and R5* can be directly displayed as a function of C2, and it turns out that C5* = 0 and R5* = 16.9 Ω for C2* = 75.6 pF. Thus, no extra element C5* is required for compensating circuit imperfections.

A final simulation run using these values for C2* and R5* confirms that the dominant pole-pair of the filter circuit is shifted (i.e. “tuned”) closely to the specified position (see the table, last row).

References:

  1. Blake, K., Application Note OA-29 “Low-Sensitivity Bandpass Filter Design with Tuning Method,” National Semiconductor Corp., Oct. 1996.
  2. Desoer, C.A., and Kuh, E.S., Basic Circuit Theory, McGraw-Hill International Edition, 1969, Chapter 16.

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