Electronic Design

Support Network Forms For OpenVera SoC Verification IP

The challenges of SoC verification are manifold. Large among them is the difficulty in rounding up the verification IP needed to build complete verification suites. To address this, Synopsys Inc., Mountain View, Calif., has launched the OpenVera Catalyst Program, with 20 design and verification service companies participating.

The program creates a broad network of verification companies with expert tool and methodology knowledge in leading verification solutions, such as the VERA testbench tool, VCS Verilog simulator, and SciroccoVHDL simulator. It complements Synopsys Professional Services' existing design and verification offerings by expanding the support and services options available to customers for meeting their verification challenges.

Participating members will create and commercialize OpenVera verification IP to accelerate the development of complete verification suites. OpenVera verification IP typically consists of verification modules such as bus functional models, traffic generators, and protocol checkers for widely used protocols.

"With the growing momentum around OpenVera, many third-party service companies have expressed interest in developing IP and services around this open language," says Jim Watts, OpenVera program manager at Synopsys. "Our joint customers will benefit by having access to a broader range of OpenVera verification IP and networks of experts trained on leading verification technologies to enhance their verification productivity."

The initial OpenVera Catalyst Program members are Aurora VLSI, Azure Software, ControlNet India, CMOS-chips, eInfochips, GDA Technologies, HCL Technologies, Inspiration Technologies, Interra Technologies, Intrinsix, nSys, Paradigm Works, PicoCraft, Qualis Design, Silicon Interfaces, SmartSand, Spike Technologies, Willamette HDL, Wipro Technologies, and Zaiq Technologies.

The program is open to design service companies that offer services in verification of complex ICs. Members will get access to licenses for VERA, VCSi, and Scirocco to create OpenVera verification IP and make it available to a rapidly growing market base of OpenVera users. Through the program, customers verifying complex ICs and SoCs are assured of fully trained and supported verification service companies that will apply Synopsys' proven verification technology in the verification flow of their complex designs.

OpenVera is an open-source hardware verification language developed specifically to meet the unique requirements of functional verification. It lets users describe the target application environment, including complex protocols and data objects, at a high level of abstraction, dramatically increasing productivity, readability, and reusability.

For more information on OpenVera, visit www.open-vera.com.

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