The company now offers a web-based capability that provides simulation models for its CL10K family of link-configured ASICs. Users of the new web service can submit a bitstream for their design at the company's web site and a simulation model is sent back, via email, within 24 hours.
Simulation models for the CL10K devices are in the Verilog language. There is no charge for this service and free samples of the ASICs are shipped within two to three weeks, including the final version of the bitstream.