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How to Design SmartNICs Using FPGAs to Increase Server Compute Capacity

Sept. 22, 2020
SmartNICs boost server performance in cloud and private data centers by offloading network processing workloads from server CPUs. Learn how to design an FPGA based SmartNIC that accelerates network functions compared to software only based solutions.

A successful SmartNIC design must be able to implement complex data-plane functions including multiple match-action processing, tunnel termination and origination, traffic metering, and traffic shaping. A SmartNIC should also provide the host processor with per-flow statistics to inform network-tuning algorithms. In addition, the SmartNIC's high-speed data plane should be programmable through either downloadable updates or network programming to enable a flexible architecture that can easily adapt to changing data plane requirements. A successful SmartNIC design must work seamlessly with existing data-center ecosystems. Otherwise, the SmartNIC design is unlikely to succeed.

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