A digital place-and-route methodology for lowest-power-optimized power, performance, and area (PPA)
The place-and-route software used in the digital implementation flow must be able to buffer on multiple power domains without errors and perform placement of all power management cells such as level shifters, isolation cells, power switch cells, and retention flip-flops. Power-sensitive designs also require routing secondary power/ground pins and routing to the power grid inside the voltage islands.
This white paper examines the Siemens Aprisa Digital Implementation Solution software low-power capabilities, including:
PowerFirst implementation technology that reduces total power consumption
Stricter guidelines imposed by version 3 of the IEC standard for harmonic current emissions push designers to embrace power-factor-correction methodologies.
The flyback topology is a versatile, widely used, switched-mode power-supply design with some interesting characteristics that brings performance and BOM advantages to many applications...
