Whitep 1 62ffb2a196257

Place-and-route tool for low power SoCs

Aug. 19, 2022
A digital place-and-route methodology for lowest-power-optimized power, performance, and area (PPA)

The place-and-route software used in the digital implementation flow must be able to buffer on multiple power domains without errors and perform placement of all power management cells such as level shifters, isolation cells, power switch cells, and retention flip-flops. Power-sensitive designs also require routing secondary power/ground pins and routing to the power grid inside the voltage islands.

This white paper examines the Siemens Aprisa Digital Implementation Solution software low-power capabilities, including:

  • PowerFirst implementation technology that reduces total power consumption
  • Support of multi-power domain methodology
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