Application Note: Solving Connection Challenges in On-Wafer Power Semiconductor Device Test

Learn how to minimize connection changes, opportunities for user error, and frustration when performing comprehensive DC I-V and C-V testing of power semiconductor devices.
Aug. 10, 2020

Measuring DC and capacitance parameters for high power semiconductor devices requires sufficient expertise to optimize the accuracy of various measurements. Even for those with this level of expertise,

managing set-up changes between ON-state, OFF-state and capacitance voltage (C-V) measurements can be time consuming and prone to errors; this is especially true in the on-wafer environment.