PCIe 5.0 works at 32 GT/s data rate per lane and offers many new features, including support for an alternate protocol, precoding to prevent contiguous burst errors, and link equalization flow enhancements. While these features offer several advantages, they also pose additional challenges for verification engineers. This paper discusses the PCIe 5.0 features and their verification challenges. It also describes a case study on how to address these challenges using a strong verification IP solution.