A switch in time

June 7, 2006
Analogue switches become download/upload time savers in portable and consumer USB 2.0 high-speed designs.

Greater data throughput between PC hosts and portable devices, such as cell phones, has ramped up adoption of USB 2.0 high-speed I/Os (480Mbps) in portable applications. In these applications, a high-speed USB switch is needed to meet market demand for faster download and upload performance.

One attractive feature emerging in hard-drive cell phones is the USB 2.0 high-speed capability that can reach 480Mbps throughput between PC host and cell phones. However, traditional full-speed USB mode still exists in baseband processors for other functional needs, such as address book synchronisation. Existing architectures mean the hard-drive controller stays outside of the baseband processor.

Unfortunately, USB serial data lines simply can't be wired together to share the common mini-USB connectors, because both D+ lines have a 1.5kΩ pull-up resistor. Even if one of the USB outputs is disabled, the trace hanging on the data bus can result in signal reflection due to the high slew rate of USB high-speed signals. This poses a risk for high-speed eye mask compliance. Later in this article we will look at how to maximise the eye opening of high-speed USB signals in terms of both dc and ac opening.

Figure 1 shows high-speed USB switches lying between two USB outputs to share the same D+/Dconnector. This effectively cuts off the redundant traces while the corresponding USB output isn't activated for communication.

In Figure 2, the output eye opening of a Fairchild USB switch (FSUSB20) is tested. Small package options (MicroPak: 1.6mm × 2.1mm) and low quiescent power consumption (

Using the USB switch-box application shown in Figure 3, two computers can share the same USB device in equipment like printers or scanners. It's able to be controlled by a manual switch on the panel or software commands. In such applications, a high-bandwidth switch like the FSUSB20 with 1.1GHz, -3db bandwidth is suitable and passes the third harmonic (720MHz) of USB 2.0 high-speed (480 Mbps) throughput.

Challenges and solutions

As mentioned earlier, in order to maximise the eye opening of the USB high-speed eye, both ac and dc factors need to be considered. The dc factor mainly refers to the dc insertion loss of the USB switches, which require low on resistance.

If we consider 45Ω termination, with on resistance smaller than 10Ω, it offers 327mV output signal swing for 400mV high-speed USB inputs. Switches with low on resistance are recommended to maximise the noise margin. But if there's too much emphasis on minimal insertion loss or low on resistance, it might mislead the designers into selecting the wrong switch.

A further item to consider involves ac effects, such as phase jitter and phase degradation. These can pose an even higher risk to eye compliance. One of dominant factors of phase jitter concerns lower bandwidth along the data path, which contributes to the deterministic jitter of the signals. In addition, higher bandwidth switches allow for high-order harmonic components (720MHz for high-speed USB data) to pass through and, as a result, speed up the rise/fall time of signal edges.

Portable-design applications that need good ESD protection usually require external ESD protection diodes. How are these diodes chosen, bearing in mind that the parasitic capacitance of the diodes can vary from 1pF to 10pF?

The ESD capacitance usually loads the switch heavily and, therefore, a low-capacitance ESD suppressor is welcome. However, some analogue switches have a larger bandwidth that offers more capacitive budget and more choices for external ESD protection devices. If the parasitic ESD capacitance is lowered, higher bandwidth will be created.

Another challenge in portable USB designs involves the power supply. The power-management unit in most cell phones has both 3.3V and 2.7V outputs. But a 3.3V supply is recommended to power the analogue switch for applications shown in Figure 1. This will achieve the minimum VOH output requirement of 2.8V under full-speed mode. That's because high-speed peripherals must be able to work under full-speed mode if the host only has full-speed capability.

With the emergence of USB OTG I/Os in next-generation cell phones, combined with higher throughput requirements for future multimedia applications, high-speed-capable portable devices will become increasingly prevalent. Analogue switches with wide bandwidth, smaller packaging, and higher ESD capabilities will help designers effectively reduce the design cycles for additional functions and shorten time-to-market.

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