High-Speed ADCs

Aug. 18, 2005

How fast is the current crop of high-speed analog-to-digital converters (ADCs)?

The pipeline architecture and silicon-bipolar and CMOS process technologies dominate commercial high-speed converters below 300 Msamples/s. Typical resolutions range from 12 to 14 bits. There's a large speed gap between 300 Msamples/s and 1 Gsample/s. The relatively few converters available above 1 Gsample/s have 8- or 10-bit resolution and use flash or folding/interpolating architectures in bipolar and CMOS process technologies. Currently, the fastest of these is a dual converter on a single chip that can be interleaved to achieve 3 Gsamples/s.

What are the application tradeoffs between speed and resolution in high-speed ADCs?

In test equipment, higher sample rates let designers measure wider ranges of signal frequencies and higher resolution in time. In communications, higher sample rates allow wider-bandwidth input signals to be digitized. On the other hand, resolution translates to dynamic range. Eight-bit resolution is adequate for oscilloscopes, because it matches the typical display resolution. In contrast, spectrum analyzers need higher resolution and so use slower high-speed ADCs. In communications, very fast 8-bit converters are used in satellite and microwave point-to-point communications due to the fairly consistent signal strength in those applications. Slower, high-resolution ADCs are used in cellular basestations to deal with variations in signal strength between nearby and distant signal sources.

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