As processors approach gigahertz clock rates and 100-A current drain, interfacing them to the analog world is becoming a monumental task. Primarion, a startup founded by former Intel executives and headquartered in Tempe, Ariz., has taken that challenge upon itself. Identifying signal integrity problems with very fast processors based on very deep submicron processes, Primarion is developing what it calls an active signal integrity architecture (ASIA).
According to Bill Pohlman, the company's chairman and chief technology officer, "As digital systems continue their relentless push to lower voltages, higher current, and increased performance, a data integrity crisis is occurring where issues like clock skew, lack of noise immunity, and soft errors are becoming performance barriers." The toughest challenge is accurately getting the results of their calculations to people, he adds.
ASIA will do for signal integrity what cache memories did for processors to maximize speed performance, says vice president of marketing Mike Esiele. He believes that this will become the preferred way to perform system design involving gigahertz-speed processors.
Initially, the architecture is being developed for the power lines feeding the microprocessors. For that, the company is developing behavioral models, a set of tools, interface specifications, and the physical chip. The goal is to deliver and distribute power to very fast microprocessors with speed and precision to maintain signal integrity and, therefore, the data accuracy. Although the initial implementation is for power management, the technology later will be extended to clock distribution and buses.
Primarion expects to demonstrate the ASIA concept by the third quarter of this year, with proof of silicon by the first quarter of 2001. The ASIA chip will be based on a high-performance bipolar process, which also is under development.
For more about Primarion, go to www.primarion.com.