The motor-speed-control circuit in the figure shows an SG3524 pulse-width-modulation (PWM) IC, U2, driving the high side of a motor through a p-channel FET, Q1. The motor terminal voltage is more easily measured with the motor connected directly to ground. U2's oscillator period is set to about two times the length of the motor's mechanical time constant. In this case, it's about 2 ms, or 500 Hz.
The loop delay is compensated at U2's CMP pin by the 33-µF capacitor. A resistive divider from U2's 5-V VREF output to ground sets the error amp's + input to 2.5 V. This voltage was selected to be in the middle of the error amplifier's output swing. However, it can be lowered to near 1 V for very low-speed operation. PWM operation at low speeds supplies very good torque output, although the ripple torque is quite high.
A permanent-magnet (PM) dc motor produces a counter electromotive force (CEMF) at its terminals equal to the applied voltage less the armature losses. Because the armature IR loss varies with motor loading, it's desirable to measure the CEMF with no current flow present. This is accomplished via the LF398 sample-and-hold IC, U1.
The output blanking pulse from U2's SYNC output lets U1 sample the motor's terminal voltage only while U2's output is inhibited. In this case, it's about a 4-µs pulse. The duty cycle of each U2 output cycle is based on the level of the previous sample of the motor's CEMF. Diodes D1 and D2 block the inductive kick from the motor armature winding. A pot divides the CEMF down to match the 2.5-V reference to U2's error amp. This pot can be replaced with divider resistors to save cost.
Indeed, one of the main objectives of this design is low cost. All of the components used are readily available and inexpensive. Although this circuit works well, it still requires some tweaking for different motors and speed ranges. Happy motoring!
