Analog/Mixed-Signal ICs: Operational Amplifiers

Jan. 7, 2002
Op Amps Continue To Flourish SINCE THE INTRODUCTION OF THE FIRST monolithic bipolar operational amplifier (op amp) in the mid-sixties by Fairchild Semiconductor (, the technology has soared to...
Op Amps Continue To Flourish Since the introduction of the first monolithic bipolar operational amplifier (op amp) in the mid-sixties by Fairchild Semiconductor (, the technology has soared to unbelievable heights, and the number of players in the market has grown steadily. Multiple processes, such as CMOS, biCMOS, complementary-bipolar (CB), and gallium arsenide (GaAs), have joined the traditional bipolar technology to serve the varying needs of myriad applications. Additionally, numerous topologies have evolved to broaden the scope of these devices. The specs just keep getting more stringent as new applications emerge.

From just tens of kilohertz in the early days, today's op amps are boasting hundreds of megahertz in bandwidth. In fact, they're approaching gigahertz performance. Equally impressive are dynamic range, distortion, and noise performance, which are accomplished at very low quiescent current and power consumption. Plus, clever calibration and chopper stabilization techniques, including digital, have evolved over the years to maintain the part's stability and accuracy over a wide bandwidth and temperature range.

Also, supply voltages have dropped dramatically. As CMOS becomes the popular process, supplies have dropped to a single 2.7 V. Meanwhile, CB technology has demonstrated 1-V capability with a gain-bandwidth product as high as 100 MHz. Although 1 V was first achieved in 1978, the op amp at the time, National Semiconductor's ( LM10, offered only a 100-kHz gain-bandwidth product.

Likewise, op-amp packaging has evolved. From traditional through-holes, op amps have come to be miniature surface-mountable packages that seem to get smaller and thermally better every day. Now, the trend is clearly toward chip-scale and flip-chip packages

For custom and semicustom applications, op-amp cores have joined the ASIC libraries of semiconductor suppliers and foundry service providers. Some have created intellectual property to enable fabless system-on-a-chip (SoC) design houses to implement proprietary amplifiers in their solutions. Others have crafted custom linear designs that pack nearly 50 precision op amps on one CMOS chip for multichannel sensor applications.

Nothing will stop the development of this ubiquitous component. It will continue to flourish as suppliers keep taking advantage of process enhancements. As suppliers combine these advances with circuit techniques, they will raise the performance bar even higher.

In many applications, data converters are dictating the requirements for amplifiers. They must perform equally well or better to get the best signal into or out of the system. Process improvements are combined with new circuit techniques to improve the bandwidth of the amplifier, while minimizing the distortion and noise performance. Manufacturers are readying parts that will offer much higher bandwidth at half the supply current.

Medium-performance, general purpose op amps have appeared in tiny packages like the SC-70 for last the few years. But recent acceptance has driven them into the mainstream. Now, high-performance parts are coming in these packages, with the aim to provide dual and quad versions. Also, the thermal efficiency of the package is being improved. Future movement is in the direction of chip-scale packages.

While precision is the norm in low-speed amplifiers, efforts are under way to extend that accuracy to high-speed junction FET (JFET) parts to meet the strict demands of optical networking, wireless basestations, medical CT scanners, and automatic test equipment (ATE) applications. Therefore, suppliers are targeting offsets of below 0.1 mV and drift ratings of 0.5 µV/°C and better for high-speed amplifiers. In addition, they're offering very low input voltage and current noise, very low input bias current, and wide bandwidth. For instance, the maximum input bias current for Analog Devices' ( latest precision amplifier is 10 pA, with output settling to 0.01% accuracy in less than 600 ns.

Single-supply operation at voltages below 3 V is gaining momentum. As more players enter this domain, they're exploiting a number of processes to reach their goals. While some CMOS- and biCMOS-based amplifiers have demonstrated performance down to 2.7 V, proponents of the CB process have gone a step further. National Semiconductor has shown that its VIP10 CB process can deliver a high-speed op amp with 1-V minimum supply voltage and a gain-bandwidth product of 100 MHz.

Digital techniques are enabling variable-gain amplifiers to precisely control input and output voltages. For very high-performance bipolar op amps, digital functions are implemented in CMOS to keep the cost down. However, if digital control is simple, existing bipolar transistors will provide the digital control cost-effectively.

No doubt, CMOS amplifiers will continue to improve and gain more territory, but some applications' requirements are just far too tough. CB or some other bipolar process will continue to serve those applications. Lately, National Semiconductor has boosted the speed and noise performance of CB transistors by incorporating full dielectric isolation techniques to significantly reduce the parasitic capacitance of these transistors. They also offer a bandwidth of 240 MHz with high output-drive capability and a quiescent current of only 4.5 mA. The dynamic range is over 90 dB with low distortion and noise. As the process improves further, expect even better performing op amps in the year ahead.

Other major CB backers include Analog Devices, Texas Instruments' Burr-Brown Division (, and Elantec Semiconductor ( Analog Devices, for instance, has refined its XFCB-12 process to give npn and pnp transistors a big boost in speed with a substantial cut in power consumption. The company will use new differential-amplifier topologies to exploit the advantages of silicon-on-insulator CB to deliver unprecedented IF and RF dynamic ranges. Distortion floors will drop to ­100 dBc at 100 MHz. Others also continue to improve their respective CB processes to crank out high-performance line driver, video amplifier, and other high-end op amps.

To deliver high-speed data over fiber, cable, and phone lines, highly power-efficient, high-speed bipolar amplifiers will tap the benefits of JFET transistors at the amp's input. The result will be an unmatched combination of high speed, low noise, and several orders of magnitude lower supply currents.

Burning power to obtain high slew rates in voltage feedback (VFB) amplifiers is no longer acceptable. Novel circuit techniques offer very high slew rates of around 3000 to 4000 V/µs at less than a 5-mA supply current. Suppliers are looking forward to doubling this performance at sub-10-mA current levels. In addition, differential input and output is in vogue for VFBs.

Current-feedback amplifiers have adequately served the needs of ADSL and cable modem lines that require high slew rates with wide bandwidths and high gain. However, at low currents (2 mA), system designers have been struggling with the dependence of bandwidth on gain for some time. Modifying the input buffer, engineers at TI's Burr-Brown division have successfully unshackled the gain from the bandwidth. Also, the output stage of these op amps has been improved to handle large voltage swings at high output currents.

Dual-channel versions also are in the works and should be available this year. While the current introductions employ dual 12-V supplies, the trend is clearly toward a single 5-V supply. Currently, these parts use a CB process, but they're migrating to SiGe biCMOS technology.

At ISSCC next month, researchers from Analog Devices will detail a precision op amp that uses autozeroing and chopping techniques to achieve a 3-mV offset with input noise of only 20 nV/√MHz. It includes additional circuitry to reduce switching transients. It's implemented in a 0.6-mm double-poly, double metal CMOS process to keep power consumption at 4 mw from a 5-V supply.

See associated timeline.


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