SoC Design Methodology Harmonizes Digital, Analog, Power

May 27, 2002
Exploiting a dramatic improvement in the digital density of its super-smart power technology, SMARTMOS, Motorola's Semiconductor Products Sector (SPS) has created a design platform for complex integrated mixed-signal system-on-a-chip (SoC) solutions....

Exploiting a dramatic improvement in the digital density of its super-smart power technology, SMARTMOS, Motorola's Semiconductor Products Sector (SPS) has created a design platform for complex integrated mixed-signal system-on-a-chip (SoC) solutions. Called DigitalPower, it economically lets SoC designers pack a high level of digital content—including microcontroller and DSP cores, serial interfaces, memories, and logic—on the same chip with high-performance analog and high-power circuits.

"This is a true mixed-mode design methodology that allows high-power analog functions like 3-A H-bridges to coexist with 32-MHz microcontrollers and processors," notes Jim Lee, marketing manager for the Advanced Consumer Products Operation at Mo-torola's SPS. Typically, the switching currents from multiple high-power analog functions near a processor can cause code upsets. Conversely, a processor's digital processing can introduce noise into analog operations.

Low-power analog functions afforded by this methodology include operational amplifiers, analog-to-digital converters (ADCs), pulse-width modulated circuits, general-purpose I/Os, bandgap references, waveform generators, and filters. High-power circuits available include high-current switch-mode regulators, H-bridge drivers for motor control, and head drives for print heads.

Optimized for 0.35-µm CMOS circuits, the new-generation SMARTMOS7 offers nearly 10 times the digital density of SMARTMOS5, which uses 0.5-µm CMOS. Meanwhile, SMARTMOS8, with 0.25-µm geometries, is getting ready for fabrication.

To demonstrate Digital-Power's capabilities, Motorola developed a complete SoC for PC host-based ink-jet printers (see the figure). It integrates an 8-bit, 16.7-MHz 68HC05 microcontroller core, 16 kbytes of ROM, 256 bytes of RAM, an IEEE-1284 parallel-port interface, a DRAM controller, a four-channel, 8-bit analog-to-digital converter, a system clock phase-locked loop, a 16-bit timer, a 16-bit COP watchdog timer, logic gates, and four 25-V H-bridges, along with a 5-V, 100-mA linear regulator, a 1.8- to 3.3-V, 25-mA linear regulator, a switch-mode regulator controller, and other motor-control specific hardware features. All this can be housed in a 100-pin TQFP.

Initially targeting printer applications, the technology is now poised for imaging, digital cameras, CD/MP3 players, and other consumer markets. And whereas Motorola earlier focused on custom designs, the company now intends to develop standard SoC chips—slated for release sometime next year—for these applications.

For ASIC designers who want to reap the benefits of DigitalPower, Motorola has created a library of digital, analog, and power functions. This open library enables users to incorporate their own proprietary functions and IP. Also available are design, development, and simulation tools.

Visit www.motorola.com for details.

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