Fabless semiconductor startup Impinj Inc. has developed an innovative technology for bridging the gap between precision analog and faster digital circuits. Implementing its patent-protected self-adaptive silicon technology, the Seattle company hopes to meld the two on a single system-on-a-chip (SoC) using the lowest-cost, highest-density standard CMOS processes available from any foundry.
While there are some approaches to adding analog circuitry to a CMOS SoC, they achieve performance at higher cost due to added processing complexity, Impinj claims. Plus, they aren't easily scalable to advanced process technologies. In contrast, notes Impinj president William T. Colleran, "Impinj's self-adaptive silicon technology simplifies the integration of high-performance analog with digital CMOS, as well as extends this capability to the most advanced deep-submicron fabrication processes available. It brings a new level of flexibility and manufacturability to SoCs containing analog and RF circuitry."
Impinj's novel technology leverages more than 10 years of research on trimmable floating-gate devices by company founders Carver Mead and Chris Diorio at the California Institute of Technology, Pasadena. In this scheme, a pair of conventional pFETs are connected to form a floating-gate readout transistor and an associated tunneling junction (see the figure). Here, hot-electron injection is used to add electrons to the floating gate, while the tunneling effect removes electrons from the gate.
By simultaneously adding or removing electrons (or charge) to this floating gate, the pFET is turned into a tunable transistor whose analog output can be precisely controlled. Subsequently, this tunable transistor is combined with circuit techniques to achieve adjustable voltage or current sources, timing-delay elements, and variable capacitors. In short, this electronic trimming technique allows analog circuits to self-tune and self-calibrate during operation.
Interestingly, the name Impinj is derived from the company's patent impact-ionized hot-electron injection mechanism, which is used to add electrons to the floating gate. Considered the father of VLSI design, Mead also is the Gordon and Betty Moore professor of engineering and applied science at Caltech. Cofounder Diorio, who did graduate work with Mead, teaches computer science and engineering at the University of Washington, Seattle.
This concept has been dem-onstrated on a number of data converters, filters, mixers, and amplifiers in eight different manufacturing processes, ac-cording to the maker. Having proven the technology, Impinj is now in the process of developing a 14-bit digital-to-analog converter (DAC) based on TSMC's 0.25-µm CMOS pro-cess, with plans to migrate to 0.18-µm and finer geometry CMOS.
Although still in the process of being characterized, the 14-bit DAC boasts a spurious-free dynamic range (SFDR) of 80 dB at a sample rate of 250 Msamples/s, while consuming only 50 mW and occupying a die area of only 0.17 mm2. In addition, it provides roughly a two orders of magnitude improvement in linearity using self-trimming and calibration techniques. The DAC is expected to be released early next year.
Meanwhile, the company is readying a 14-bit analog-to-digital converter (ADC) slated for introduction in the third quarter of 2002. Though the initial chips are standalone analog ICs, Impinj is planning to extend this capability soon to SoCs for communications applications. The company roadmap indicates monolithic cable tuners and wireless transceivers by 2003.
For more information, visit www.impinj.com.