As signals become faster and timing margins tighten improved techniques are necessary to characterize signal timing and to troubleshoot the sources of excessive jitter. If you have several types of instruments that measure jitter, it can be frustrating to get different jitter numbers from different instruments for the same signal. The material covered in this seminar will give insight into advanced methods of measuring jitter, reducing the amount of jitter added to the signal by the measurement process and correlating measurements made using different algorithms. Practical examples will include clock signals, PCI-Express (2.5 and 5 gbps), SATA/SAS (3 and 6 gbps), jitter caused by power quality, troubleshooting modulation/crosstalk, intermittent sources of jitter and other real world examples. Material will cover the use of time domain, frequency domain and statistical tools to isolate the sources of jitter. Advanced topics will include Virtual Probing and the Q-Scale methodology for jitter estimation (including Tj breakdown into Rj and Dj). Click here to register.
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