10-Bit ADCs Break 2.5 Gsample/s Barrier

Oct. 8, 2008
The EV10AS150 family of 10-bit ADCs samples at 2.5 Gsamples/s in the first and second Nyquist zones, a feat attributed to the company’s monolithic data converter design technology employing B7HF200 silicon from Infineon. With an input bandwidth

The EV10AS150 family of 10-bit ADCs samples at 2.5 Gsamples/s in the first and second Nyquist zones, a feat attributed to the company’s monolithic data converter design technology employing B7HF200 silicon from Infineon. With an input bandwidth of 4 GHz, the devices suit receiver applications such as direct-RF sampling, telecom test instrumentation, digitizer systems, automatic test equipment, wideband satellite receivers, and high-speed data storage. Other features include a SFDR greater than 60 dB, SNR of 51 dB, an ENOB of eight bits at 2.5 Gsamples/s, and a selectable ratio DMUX output, 1:2 or 1:4, for interfacing with industry-standard FPGAs. In November, samples of the EV10AS150 series will be available in 317-pin, 25 mm x 35 mm EBGA packages with commercial or industrial temperature ranges. E2V, Elmsford, NY. (800) 342-5338.

Company: E2V

Product URL: Click here for more information

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!