Feedback integrator
Delectric absorption
Elegant circuit
Low-DA capacitor
DAC feedback
Many sensors have a small analog signal that rides on top of a larger dc pedestal. For these circuits (Fig. 1), the signal must be ac coupled and amplified before it’s digitized. The feedback of an integrator causes the main amplifier to become a high pass filter:
A nice feature of this topology is that the integrator’s input offset error sets the total system dc offset at the output and is independent of the overall gain (G). Also, the amplitude of the ac signal determines the maximum gain, not the dc pedestal. But this circuit has three practical limitations that will require extra circuitry: settling time, disturbance rejection, and dielectric absorption.
Settling Time
The settling time for a high pass filter is a function of the filter roll-off value (f0) and the acceptable resolution of the dc pedestal (nBits):
For the high pass frequency of 10 kHz and a resolution of 8 bits, the settling time is around 89 µs. But for a high pass frequency of 0.05 Hz and a resolution of 12 bits, the settling time is around 0.27 s. Obviously, high pass filters with very low value are going to require a long time to settle.
One workaround is to temporarily increase the high pass frequency to cause a faster restore. This is generally implemented by using an analog switch to connect a smaller parallel resistor to the integrator’s existing input resistor. Say you have a 0.05/10-Hz high pass filter. Intelligence is required to determine when a rapid restore is necessary.
Rejecting Disturbances
Large disturbances at the input of the filter can saturate the gain stage and corrupt the integrated value. One approach is to rapidly restore after a disturbance. Another method is that if you know when the occurrence will happen, disconnect the integrator from the soon-to-be saturated output. When the amplifier has settled down from the disturbance, you can reconnect the integrator. The integrator connection/disconnection can be implemented with an analog switch in series with the integrator’s input.
Dielectric Absorption
Dielectric absorption is the inability for a capacitor to release all its stored energy in a timely manner. This effect also is called soakage, dielectric soak, residue charge, and voltage retention. It has other names that I learned from old engineers when I was a young engineer, but they are not fit for print.
I personally experienced this effect when I shorted out the high-voltage electrodes to discharge a color TV tube. About 10 minutes later, when I went to move the tube, I got a very pragmatic lesson (Fig. 2) and a hefty discharge when the electrodes made contact with my chest.
The dielectric absorption (DA) value, defined as the ratio of these two capacitors, is expressed as a percentage. X7R ceramic capacitors have a DA of about 1% and are typically acceptable for filter values down to 1 Hz. Below that, you’ll need a “poly” cap.
Polyester and polycarbonate capacitors have a typical DA value of 0.2%. Polypropylene capacitors have a typical value of 0.1%. Poly is Latin for many, much, or a lot. They are called poly caps because they are going to cost a lot of money.
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Figure 3 shows the changes to the filter required to compensate for these three problems. To compensate for these problems, a resister, two analog switches, and an expensive capacitor had to be added. There must be a better way.
DAC To The Rescue
Since most likely the signal is going to be digitized, the analog integrator can be replaced with a DAC and a simple digital filter. Figure 4 shows the topology. A digital accumulator replaces the integrator. This can easily be implemented in C:
DAC += Vout/a;
In the transfer equation, fs is the sample rate of the analog-to-digital converter (ADC) and digital-to-analog converter (DAC):
The high pass filter value is a function of the main amplifier gain, the sample frequency, and the feedback attenuation (a). For a gain of 100, a sample rate of 1 ksample/s, and a high pass value of 1 Hz, the attenuation value is 15,915.
An attenuation of 214 would set the filter value to 0.97 Hz. Although not exactly 1 Hz, it has the advantage that the attenuation can be easily implemented with a series of 14 shifts. The C implementation of the accumulator is:
DAC += Vout>>14;
With this implementation, a rapid restore is easily implemented to reduce the attenuation value. Reducing the attenuation to 210 changes the filter value to 15.5 Hz. Large disturbances can be kept out of the accumulator by not allowing it to be updated.
Non-Causal Disturbance Rejection
In the analog implementation of the filter, the integrator feedback can only be disabled at the beginning of the event trigger. This requires the event detection circuitry to be fast enough to keep the event from corrupting the integrator value. With the DAC implementation, previous DAC values can be stored to allow the accumulator to be set to some previous valid value before the disturbance.
It is therefore possible to set the accumulator to some valid value before the detected event. (It is like digital oscilloscopes that allow you to see events before the trigger.) This takes the pressure off the event detector, allowing for a design with slower, less expensive parts.
Why Stop At A Filter?
This filter has a gain stage with accumulator feedback. However, other forms of feedback could be used. One general case for the amplifier output (ADC input) would be:
When solving for VIn, it becomes apparent that the resolution of the ADC has improved by a factor of G. (If the ADC has a least significant bit of 250 µV, the resolution of the reading referred to the input is 250 µV/G.) This method can be used to increase the resolution of your ADC.
The method is particularly useful when you have a large, slow pedestal voltage with a fast small signal. Setting the amplifier gain to 16 would turn a 12-bit ADC into a 16-bit ADC. However, the DAC has to be very linear or have an extremely sane differential nonlinearity (DNL). One solution is to use a density DAC (Fig. 5).
Filtering specific percentages of two references generates the DAC value. The density is defined as the percentage a logic signal that’s high. The actual DAC value is a function of this density:
The density is a digital signal and has a specifically defined “high” time. The actual reform, in the first order, is not important. It could be a pulse-width modulator (PWM), a delta-sigma modulation, a random modulation, or some other waveform. The RC values are chosen to remove the ripple. The higher the density frequency, the easier it is to filter to a stable DAC value. X7R capacitors would be adequate.
In a world of decreasing DAC cost, it makes sense to remove expensive capacitors. Coupling with logic or the CPU allows for easy, rapid restoration and non-casual event rejection.
The density DAC is a method to cheaply build a DAC, and it’s meant to serve as an introduction to my next couple of columns where I will be writing about signal processing in the density domain. Stay tuned!