Digital ouput duty cycle
Integrating feedback controller
As an “old guy” engineer, I have been blessed to witness the mindboggling changes in technology over the past 30 years. I would have to say the most significant improvement has come in the field of digital design. The state of the art has gone from small-scale logic chips and green logic templates to FPGAs designed and tested with Verilog or VHDL. Every kid coming out of school knows one or the other.
More important, though, is the discipline that digital designers have developed. It is not uncommon to see two designers agree that one will do the design while the other does the test vectors and then switch roles for the next design. Of course, there has been great improvement in analog design, but digital IC designers are still far more likely than analog designers to get a working chip the first time. Frankly, the average digital chip designer has more control over 500,000 gates than an analog chip designer has over 500 transistors.
Analog designers are now aware of this discrepancy, and analog researchers at the universities have asked their digital colleagues how they may be able to capitalize on their experiences. The response? “Become more digital!” The result is mixed-signal design, which I define as the worst quality analog you can get away with followed by digital processing—for example, a Class D amplifier. Density signal process is a concept that fits well with mixed-signal design. The concept is worthy of explanation.
What Is The Density Domain?
Here are three ways of representing some quantity or value:
Analog is a single, unique value with its resolution limited only by noise. Its magnitude can be volts, amps, ohms, pounds, etc.
A digital value is represented as a series of weighted pulses or bits. In communications, this is known as pulse code modulation (PCM). Two values allow these bits to be converted to their equivalent analog value: range and resolution. Range is the allowed limit of the digitized signal. Resolution is the quantization level, also known as Δ or LSB.
The ratio of these two values determines the number of quantization steps. For “n” bits, there are 2n quantization steps. The number of bits ideally determines the resolution. From a practical standpoint, noise and analog-to-digital converter (ADC) imperfection will cause there to be less resolution. PCM is the output of an off-the-shelf ADC.
Density is a lot like digital, as it is a logic level signal. It is, however, a single bit stream. The density is the percentage of time that the digital stream is high. A pulse-width modulator (PWM), for example, is a density signal with its density value called a “duty cycle.” Given a density value (d) and logic high and low reference values RefHigh and RefLow, it is possible to determine the value represented using:
Value = RefHigh • d + RefLow • (1 – d)
A common trick is to make a digital-to-analog converter (DAC) by filtering a PWM output. In this case, the density is the duty cycle, RefHigh is the supply voltage (Vdd), and RefLow is zero. Plugging these variables into the previous equation produces the readily recognizable equation below:
VDAC =Vdd • duty cycle + 0 • (1 – duty cycle) = Vdd • duty cycle
Put another way, filtering a 5-V signal 60% of the time results in a 3-V value (Fig. 1).
The resolution of a density signal is a function of how long you look at it. With 100 counts, you should be able to resolve about one part in 100. For 1000 counts, the resolution is one part in 1000. This is the ideal case since, like the digital format, noise and modulator imperfections affect the actual resolution. Therefore, resolution is a function of the sample rate. This is ideal for flexible ADC or DAC design.
In the density domain, to the first order, only the percentage high (density) matters, not the actual shape of the waveform. In the density domain, the three waveforms in Figure 2 are equivalent.
Each of the three waveforms is an output of a specific type of modulator, which is defined as a component that converts an input, either of analog or digital format, into a digital density output. The top waveform is the result of pulse width modulation, which is guaranteed to produce a waveform with the lowest possible frequency.
For each cycle, there is a single rising edge and a single falling edge. This type of modulation is most useful when there is a cost associated with switching (i.e., power consumption) or a specific output frequency is required. A switched voltage regulator is an ideal example.
The middle waveform is the result of delta-sigma modulation (DSM), which is guaranteed to produce a waveform with the highest possible frequency based on the product of the sample clock with the smaller of either the density or co-density. This type of modulation is most useful when it is desirable to move switching harmonics as high as possible up the spectrum. It allows higher bandwidth and faster responding filters. A delta-sigma DAC is a good example of DSM.
The bottom waveform is the result of pseudorandom modulation (PRM). PRM is where each clock output has a statistical probability (density value) of being logic high. The output frequency is roughly half that of DSM. With the output being near random, switching harmonics are spread evenly over the spectrum.
This type of modulation is most useful when it is desirable to reduce switching noise. A good example of an application that can benefit from PRM is a battery charger designed to be used in close proximity to a radio receiver.
Density Domain Example
To further explore these concepts, consider a voltage regulated buck converter. This circuit will require feedback into the output voltage, which can be converted to a digital density to control the switching of a pass transistor. Because there are losses associated with switching, a PWM output would be desirable. Figure 3 shows the topology for an analog input, 32-kHz PWM output analog-to-density converter (AdC).
The XOR gate and filter function to measure phase. When these inputs are in phase, the output is zero. When the inputs are 180% out of phase, the output is the supply voltage. The output voltage is proportional to the phase difference.
Since these two square waves have slightly different frequencies, the phase difference changes linearly and the output will be a rail-to-rail triangle wave with a frequency equal to the difference of the frequencies (32 kHz).
When this triangle wave is compared with the input, a pulse proportional to the input voltage is formed. An input equal to 60% of the supply voltage will be greater than the triangle wave 60% of the time, producing a pulse with a duty cycle or density of 60%. This is an AdC. Figure 4 illustrates the topology of a voltage-regulated power supply.
The transistors, inductor, and capacitor are used to form a buck converter, which is really a density-to-analog converter (dAC). A filter is defined as a component that converts a density input to either an analog or digital output. In this case, the output voltage is:
VOut = VDraw • duty cycle
This output voltage is scaled and compared to a reference voltage. The error is integrated and fed back to the density modulator. Known as integral feedback, this is the “I” part of a PID control loop. If the output voltage drops, the integrated error will increase, causing the modulator to output an increased density that causes a larger output voltage. Power-supply designers have been doing this longer than I have been around, but few have likely ever thought of it as a density exercise.
There are many different types of density modulators and density filters, and it is relatively easy to move from one domain to another. In Part 2 of this series, I will show how signal manipulation (processing) can be performed in the density domain.