Fig 1. Two analog multipliers form a VCO with quadrature outputs, while a third multiplier provides AGC to stabilize output voltages without adding distortion.
Fig 2. The oscilloscope trace of the VCO’s outputs shows they are clean sinusoidal signals in quadrature.
Sometimes a simple solution to a problem substantially surpasses expectations. This Idea for Design is a case in point. It is a quadrature voltage-controlled oscillator (VCO) that operates over two decades of frequency with less than 0.07% total harmonic distortion (THD), made from a handful of readily available parts.
To test a two-phase brushless dc motor, we needed a sine-cosine (quadrature) oscillator with matching wave-shapes that had less than 2% THD to feed an existing two-channel linear power amplifier to synchronously drive the motor. We also needed to be able to vary the frequency over two decades (in this case 1 to 100 Hz) with reasonably constant amplitude over the frequency range—and we needed it in a hurry.
Searching for a suitable circuit that we could cobble together using on-hand or in-stock parts proved less than fruitful. Most published circuits were either single-frequency oscillators or had output amplitudes that varied widely over the frequency range. Further, designs that covered two to three decades of range typically required multi-deck rotary switches to change multiple timing capacitors.
In addition, many of the published circuits were fussy in terms of loop gain, were hard to start, or were unstable, and some required unusual or unpredictable components like incandescent lamps to provide the necessary feedback to servo the loop gain. We also had to reject complex techniques like esoteric polyphase magnetics, PROM/DAC, MCU, and pulse-width modulation (PWM) because of our immediate need.
One promising approach used two analog multipliers to form a voltage-controlled quadrature oscillator. Such oscillators aren’t new, but published designs have high distortion on one output (as high as 4% to 5% THD) yielding mismatched waveforms that were not good for our application.1
The simplicity and inherent linearity capabilities of such oscillators were appealing, however, and so we looked for a way of solving the distortion problem. The design we developed uses three Analog Devices AD633 low-cost analog multiplier ICs to solve our problem and offer a surprising level of performance considering its relative simplicity.
In general, you create a sinusoidal oscillator by providing an amplifier with positive feedback at 180° of phase shift and a loop gain of exactly one. With a gain of less than one, the oscillations will die out. With more than one, the oscillations will grow until the outputs saturate. Breaking the feedback’s required 180° phase shift into two 90° phase shifts enables you to derive quadrature outputs.
In this design, multipliers U3 and U4 both act as integrators with C14 integrating the output of U3 and C11 integrating U4’s output (Fig. 1). Resistors R8 plus R10 and resistor R9 ensure constant current output operation from the outputs of U3 and U4 respectively.
Because integration simply yields a 90° phase shift when its input signal is sinusoidal, connecting the output of each multiplier-based integrator to the appropriate input of the other multiplier creates a feedback configuration with the required 180° phase shift split into two parts. The output of U3 provides the cosine signal, and U4 provides the sine signal. By controlling the integrators’ gains, dc input signal EC determines the configuration’s oscillation frequency, with the scale factor of 10 Hz/V.
Components R5, R6, and C7 provide the regenerative feedback for U4 that starts and maintains oscillation. Using a simple feedback loop for U3, however, would create challenges in keeping the configuration’s overall gain value at exactly one. Most sine oscillators instead use nonlinear components like diodes, JFETs, or incandescent lamps in the feedback loop to keep oscillations from growing to saturation, inevitably causing distortion in the output.
The trick to obtaining low distortion figures on both outputs and keeping the overall gain at exactly one is the automatic gain control (AGC) circuit implemented using multiplier U1, which leverages the analog multiplier’s inherent linearity to create a variable attenuator. The multiplier IC implements the transfer function W=(X1-X2)(Y1-Y2)/10, and that divide-by-10 is the key to providing controlled attenuation.
Zener diode D1 creates a reference voltage serving as the base amplitude command for multiplier U1. Diode D2 half-wave rectifies multiplier U3’s output, and components R2, R3, and C1 filter the rectified signal into a dc value proportional to U3’s output amplitude. Multiplier U1’s X-input differential amplifier thus acts as an error amplifier while the Y-input differential amplifier acts as an inverter to attain negative feedback.
The IC’s multiplier section turns the X-input error signal into a variable gain coefficient for multiplication of the Y-input feedback signal. This mechanism effectively controls U3’s output amplitude to produce a constant operating point well between saturation and cutoff. This adaptive control allows U3 to provide constant amplitude and low-distortion operation over the full VCO frequency range.
The outputs of this circuit as seen on an oscilloscope show clean sinusoidal waves with the correct phases (Fig. 2). Using the values shown in the schematic, the VCO produced a frequency range measured to be from 0.9 to 113 Hz, with distortion under 0.07% THD over that range. At one point the THD figure was 0.044% as measured on a distortion analyzer. These results were well over an order of magnitude better than we needed and much better than we expected.
The circuit as shown has an amplitude settling time of approximately eight seconds before stabilizing to within 1% of its final value. This result represents a tradeoff between settling time and distortion at low frequencies in the choice of value for filter capacitor C2 in the AGC circuit.
Lowering C2’s value to reduce settling time creates insufficient filtering at lower operating frequencies. This limitation causes excessive pumping of the AGC voltage and increases distortion. For a limited frequency band toward the higher end of the range, however, the value of C2 can be safely lowered to substantially reduce settling time without an excessive increase in distortion.
Because the feedback path through U1 is first order, the gain needed for maintaining the output amplitude constant to ±3% over the full frequency range causes the servo response to be noticeably under damped. Employing a second-order feedback transfer function and/or adding a compensation network can improve the damping, at the expense of simplicity and the two decades of operating frequency range.
This design can be configured for operation over a different frequency range by changing the values of integration components R8, R10, C14, R9, and C11 along with feedback components R5, R6, C7, and C2.