More Designs Embrace The Versatile RS-422 Receiver

Jan. 24, 2012
Answers to frequently posed questions about working with RS-422 receiver devices.

Differential, and in particular RS-422 receivers, have experienced renewed popularity thanks to their versatility. Nonetheless, our applications team still contends with a number of questions:

“What to do with unused inputs?”

“Is failsafe biasing necessary?”

“How does one interface differential receivers to single-ended drivers?”

Through an internal receiver design overview, equation derivation for various components, and two examples of receiver interfaces, this article aims to deliver some answers.

Receiver Design

A differential receiver consists of a differential comparator with preceding input voltage dividers (Fig. 1). The device detects logic states based on the difference in input potentials—not with respect to ground.

Internally, the small comparator hysteresis appears amplified by the input attenuator network at the receiver inputs. Tolerances in comparator hysteresis and the input attenuator require the minimum positive and negative input threshold levels to be set to VIT+ = +200 mV and VIT– = –200 mV, respectively. This range, known as input sensitivity, thus defines the minimum differential input voltage of VID-MIN ≥ ±200 mV, which enables defined comparator output switching.

Because VID is defined as VA – VB, the non-inverting input (A) must be 200 mV more positive or negative than the inverting input (B) to switch the comparator output HIGH or LOW, respectively. Smaller input levels cause an undetermined output stage, potentially causing the output to be HIGH for one device and LOW for another.

Internally, high-impedance resistors bias the receiver inputs to approximately 2 V (at B) and 3 V (at A). This makes them sensitive to external noise when left open or floating. To prevent external noise from triggering the comparator erratically, unused inputs should be connected to external, low-impedance reference potentials.

Failsafe Biasing

Failsafe biasing is a provision for driving the receiver outputs into defined logic states when VID < |200 mV|, which occurs during bus idling. For example, if the line driver in a simple RS-422 bus is disabled and its outputs are high impedance, the low-impedance termination resistor (RT) makes VID = 0 V (Fig. 2). This places the receiver inputs into the undetermined input voltage. Ensuring that receiver output states (preferably HIGH) are defined requires failsafe biasing resistors (RB). Through voltage-divider action with RT, RB raises VID above 200 mV.

For clarity, Figure 2 also shows the lumped equivalent circuit of the bus with RB, RT, and the equivalent input resistance (RINEQ = RIN/n), which represents the common-mode input resistance of all receivers (n) connected to the bus.

To find an equation for RB, the node-currents in A and B are determined and solved for the respective line voltages VA and VB:

Establishing the difference between VA and VB yields the differential input voltage (VAB) as a function of RB:

Before solving for RB, it’s imperative to consider two other standard constraints that impact the value of RB:

• Though RS-422 doesn’t explicitly mention a maximum common-mode load, the standard specifies that a driver must be able to drive 10 receivers with a minimum input resistance of 4 kΩ. This basically defines a maximum common-mode load of RCM = 4 kΩ/10 = 400 Ω.

Failsafe biasing also represents common-mode loading. Therefore, the combination of RB and RINEQ must not drop below RCM. Thus, the maximum loading caused by the receiver inputs is limited to:

• Because the biasing resistors are in parallel to RT in terms of ac, their combined resistance should match the characteristic cable impedance (Z0)0 to avoid signal reflections on the bus. This limits RT’s conductance to:

Inserting Equations 2 and 3 into Equation 1 and solving for RB yields:

After calculating RB, Equation 3 can be used to find the actual value for RT. Finally, solving Equation 2 for n will determine the maximum number of receivers that can be connected to the bus:

For RIN, the minimum receiver input resistance specified in the datasheet should be used.

Interfacing Differential Receivers To Single-Ended Drivers

When designing a data link, the driver sometimes supports a different standard than the receiver. In this case, it’s vital to compare the driver output characteristics with the receiver input characteristics to determine if a direct electrical link is possible or if it requires level translation devices. In particular, the following parametric pairs should be compared:

  • Maximum driver output levels with maximum receiver input levels
  • Minimum driver output levels with receiver input threshold
  • Driver output loading with receiver input resistance

To illustrate, what follows are two examples for interfacing a differential receiver, one to an RS-232 driver and another to a logic gate.

Over the past two decades, RS-232 drivers have experienced little changes in their output parameters. Typical 5-V drivers possess minimum and maximum output voltages of ±5 V and ±15 V, respectively. Low-volt drivers operating at a nominal supply of 3.3 V show slightly lower values of ±3.7 V and ±13.5 V, respectively. However, the load impedance range of 5 kΩ ± 2 kΩ remains the same for both device families.

By contrast, RS-422 receivers show significant changes between 5- and 3.3-V designs. Most 5-V receivers allow for a maximum input voltage of up to ±25 V and feature a typical input resistance of 15 kΩ. Their 3.3-V successors possess significantly reduced values of ±14 V and 8 kΩ, respectively. For more clarity, Table 1 lists the driver and receiver parameters for 3.3- and 5-V components.

The simplest way to attenuate the driver output, and maintain a 5-kΩ load resistance, is to use a 2-kΩ/3-kΩ voltage divider (Fig. 3). In this case, the receiver input voltage is attenuated to 0.6 times the driver output voltage.

While the 2-kΩ value can be realized with R1, the 3-kΩ value represents a combination of R2 and the receiver input resistance. It’s easy to find the R2 value—it requires adjusting a potentiometer in place of R2 until the voltage at input A is approximately 0.6 times the driver output. Typical values for R2 are 3.4 kΩ for receivers with RIN = 15 kΩ, and 4.02 kΩ (and even 3.9 kΩ) for receivers with RIN = 8 kΩ.

Although receivers with 25-V capability don’t need a voltage divider, it’s better to use one to match the driver’s load resistance. Impedances seen by the driver that are too high can result in faster switching transients, which may lead to electromagnetic interference (EMI) and crosstalk issues at the bus end.

Note that the driver and receiver might not share the same ground potential, which is indicated by the different ground symbols. The aforementioned voltage-divider values, though, ensure that the interfaces operate reliably, even with ground potential differences of up to ±15 V for 25-V devices and up to ±5 V for 14V devices.

Interfacing Logic To RS-422

Another common inquiry involves interfacing standard logic to a differential receiver. The following example assumes a logic gate of the advanced high-speed CMOS (AHC) family driving an RS-422 receiver. Table 2 lists the necessary driver and receiver parameters.

Interfacing a logic gate to a differential receiver is a simple task: feed one receiver input (A) with the gate output while biasing the other input (B) with a low-impedance reference voltage (Fig. 4). As mentioned earlier, one must never rely on the receiver’s internal, high-impedance biasing, which is sensitive to noise coupling (thus making it easy to shift).

The reference voltage should lie between the lowest VOH-MIN and the highest VOL-MAX level:

Depending on the accuracy required, a 1.5-V reference can be produced through a voltage divider. Be aware that the receiver input resistance may vary significantly between devices and over temperature. This requires individual trimming between designs, which is time-consuming and cost-intensive. A low-cost voltage regulator, on the other hand, provides a low-impedance reference potential with good temperature stability.


1. Goldie, J., “Inter-Operation of Interface Standards,” National Semiconductor Corp., Application Note 972, 1994.

2. Kugelstadt, Thomas, “Passive Failsafe for an Idle Bus,” Texas Instruments, Analog Applications Journal, 1Q 2009.


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