Electronicdesign 6136 0611curtisswright

Dual 4 GSPS Transceiver Features On-Board Virtex-7 FPGA

June 14, 2013
ADC/DAC engine combines 2 channels of 4 GSPS 12-bit ADC, 2 channels of 14-bit DAC data conversion, and programmable Virtex-7 FPGA on 3U OpenVPX card.

A new dual channel ADC/DAC engine from Curtiss-Wright, the VPX3-530, combines two channels of 4 GSPS 12-bit ADC and two channels of 14-bit DAC data conversion on a single, rugged 3U OpenVPX card. An on-board, programmable Virtex-7 FPGA couples the ADC and DAC channels for low latency between inputs and outputs. Designed for SWaP-constrained embedded digital receiver applications deployed in harsh defense and aerospace environments, the transceiver is suitable for use in SIGINT, ELINT, SDR, Radar Warning Receivers and ECM Radar. The card provides support for up to four analog inputs, which can be configured as dual 4 GSPS/12-bit or four 2 GSPS/12-bit channels. Two RF sample clock sources are provided through the front panel. Modes are supported that allow synchronous ADC and DAC data sampling or independent sample clock for the ADCs and DACs. The device has the ability to operate in a synchronous mode across multiple boards to form an array of synchronized analog inputs. The VPX3-530 I/O engine is offered in a range of ruggedization configurations, including commercial, air-cooled rugged and conduction-cooled.

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